From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28326 invoked by alias); 8 Dec 2011 08:58:59 -0000 Received: (qmail 28317 invoked by uid 22791); 8 Dec 2011 08:58:58 -0000 X-SWARE-Spam-Status: No, hits=-2.6 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from sibelius.xs4all.nl (HELO glazunov.sibelius.xs4all.nl) (83.163.83.176) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 08 Dec 2011 08:58:43 +0000 Received: from glazunov.sibelius.xs4all.nl (kettenis@localhost [127.0.0.1]) by glazunov.sibelius.xs4all.nl (8.14.5/8.14.3) with ESMTP id pB88wCRn026389; Thu, 8 Dec 2011 09:58:12 +0100 (CET) Received: (from kettenis@localhost) by glazunov.sibelius.xs4all.nl (8.14.5/8.14.3/Submit) id pB88wBu2008282; Thu, 8 Dec 2011 09:58:11 +0100 (CET) Date: Thu, 08 Dec 2011 09:04:00 -0000 Message-Id: <201112080858.pB88wBu2008282@glazunov.sibelius.xs4all.nl> From: Mark Kettenis To: brobecker@adacore.com CC: macro@codesourcery.com, gdb-patches@sourceware.org In-reply-to: <20111208083113.GH21915@adacore.com> (message from Joel Brobecker on Thu, 8 Dec 2011 09:31:13 +0100) Subject: Re: [PATCH] MIPS/Linux: Update the number of pseudo registers too References: <20111208083113.GH21915@adacore.com> Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-12/txt/msg00255.txt.bz2 > Date: Thu, 8 Dec 2011 09:31:13 +0100 > From: Joel Brobecker > > > Similarly to the previous general MIPS change (pc_regnum and sp_regnum) > > the Linux backend needs to update the number of pseudo registers as it > > adds the "restart" register. No regressions in mips-linux-gnu testing > > (native and remote). OK to apply? > > I don't understand this one. Isn't the register added to the list of > normal registers, rather than pseudo registers? MIPS is a bit weird, since all register access is done via pseudo registers to deal with 32-bit vs. 64-bit issues (in particular, supporting a 32-bit ABI on 64-bit hardware).