From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1857 invoked by alias); 18 Nov 2011 02:01:40 -0000 Received: (qmail 1637 invoked by uid 22791); 18 Nov 2011 02:01:38 -0000 X-SWARE-Spam-Status: No, hits=-2.0 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from rock.gnat.com (HELO rock.gnat.com) (205.232.38.15) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 18 Nov 2011 02:01:23 +0000 Received: from localhost (localhost.localdomain [127.0.0.1]) by filtered-rock.gnat.com (Postfix) with ESMTP id E1A1E2BB382; Thu, 17 Nov 2011 21:01:22 -0500 (EST) Received: from rock.gnat.com ([127.0.0.1]) by localhost (rock.gnat.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id GzoauBOBEBdZ; Thu, 17 Nov 2011 21:01:22 -0500 (EST) Received: from joel.gnat.com (localhost.localdomain [127.0.0.1]) by rock.gnat.com (Postfix) with ESMTP id A4C9D2BB36B; Thu, 17 Nov 2011 21:01:22 -0500 (EST) Received: by joel.gnat.com (Postfix, from userid 1000) id 9EA37145615; Thu, 17 Nov 2011 21:01:21 -0500 (EST) Date: Fri, 18 Nov 2011 02:01:00 -0000 From: Joel Brobecker To: Ulrich Weigand Cc: gdb-patches@sourceware.org, tromey@redhat.com Subject: Re: Checked in: [RFA] read_frame_register_value and big endian arches Message-ID: <20111118020121.GA2703@adacore.com> References: <20111110171526.GC5390@adacore.com> <201111161822.pAGIMpx5015021@d06av02.portsmouth.uk.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201111161822.pAGIMpx5015021@d06av02.portsmouth.uk.ibm.com> User-Agent: Mutt/1.5.20 (2009-06-14) Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-11/txt/msg00492.txt.bz2 > It seems this completely broke reading of register variables on SPU. These > are in the high-order element of the (always vector) registers, even though > we have a big-endian architecture. Ooops, sorry about that. > It seems the underlying problem is that your new > read_frame_register_value routine completely ignores the value_offset > of the lval_register value. Yeah, I'm not very with that part of struct values. > note that for big-endian architectures, value_offset is already > correct, so if you'd respect it, you wouldn't need any special-purpose > big-endian code. > > Also, if you'd respect value_offset, the SPU special cases would work. I will try to fix ASAP. I am sorry if that caused some fustration when trying to do your testing. I didn't want to do the work in the first place but I, too, got my testing broken by someone else's change! -- Joel