From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23008 invoked by alias); 10 Aug 2011 12:28:46 -0000 Received: (qmail 23000 invoked by uid 22791); 10 Aug 2011 12:28:45 -0000 X-SWARE-Spam-Status: No, hits=-2.4 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from sibelius.xs4all.nl (HELO glazunov.sibelius.xs4all.nl) (83.163.83.176) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 10 Aug 2011 12:28:29 +0000 Received: from glazunov.sibelius.xs4all.nl (kettenis@localhost [127.0.0.1]) by glazunov.sibelius.xs4all.nl (8.14.5/8.14.3) with ESMTP id p7ACR6kT000217; Wed, 10 Aug 2011 14:27:07 +0200 (CEST) Received: (from kettenis@localhost) by glazunov.sibelius.xs4all.nl (8.14.5/8.14.3/Submit) id p7ACR31R013872; Wed, 10 Aug 2011 14:27:03 +0200 (CEST) Date: Wed, 10 Aug 2011 12:28:00 -0000 Message-Id: <201108101227.p7ACR31R013872@glazunov.sibelius.xs4all.nl> From: Mark Kettenis To: yao@codesourcery.com CC: gdb-patches@sourceware.org In-reply-to: <4E415152.8020905@codesourcery.com> (message from Yao Qi on Tue, 09 Aug 2011 23:25:06 +0800) Subject: Re: [RFA 7/8] New port: TI C6x: test case fixes References: <4E263904.8030204@codesourcery.com> <4E2D1AC1.9070102@codesourcery.com> <201108091522.12881.pedro@codesourcery.com> <4E414C49.9020507@codesourcery.com> <201108091515.p79FFoUs007220@glazunov.sibelius.xs4all.nl> <4E415152.8020905@codesourcery.com> Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-08/txt/msg00214.txt.bz2 > Date: Tue, 09 Aug 2011 23:25:06 +0800 > From: Yao Qi > > On 08/09/2011 11:15 PM, Mark Kettenis wrote: > > Why depend on this NOMMU-magic? Just install the signal handler for > > bth SIGSEGV and SIGILL, try a store to (or perhaps a read from) > > address 0, and then fall through to executing an illegal instruction. > > Because I want to reduce the scope of using invalid instruction. We > only need to know the invalid instruction for HAS_NOMMU arch, and emit > error if we forget to define an invalid instruction for a new NOMMU > port. Do it make sense? I don't really think that's an issue. If the test is run on an mmu-less machine for which no illegal instruction is defined, the test will fail. That should prompt someone to look at the test and add the missing instruction. I really just want to avoid the #ifdef maze you're creating which makes the code more complicated and the test less generic. I think you're too much focussed on reducing the number of FAILs for your particular target to zero instead of improving the tests such that they become more generally useful. For example: > diff --git a/gdb/testsuite/gdb.base/savedregs.exp b/gdb/testsuite/gdb.base/savedregs.exp > index eeee0ff..4408137 100644 > --- a/gdb/testsuite/gdb.base/savedregs.exp > +++ b/gdb/testsuite/gdb.base/savedregs.exp > @@ -84,6 +84,14 @@ proc process_saved_regs { current inner outer } { > # Sigtramp frames don't yet print . > set pat "Stack frame at .* Saved registers:.*" > } > + thrower { > + if { [istarget tic6x-*-*] } { > + # On tic6x, there is no register saved in function thrower. > + set pat "Stack frame at .* in $func .*" > + } else { > + set pat "Stack frame at .* in $func .* Saved registers:.*" > + } Why are you special-casing tic6x here? Is the architecture really that special that there are no saved registers? I suspect it isn't and that this can happen on other architectures as well, depending on how much optimization the compiler is doing.