From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28446 invoked by alias); 17 May 2011 17:20:35 -0000 Received: (qmail 28437 invoked by uid 22791); 17 May 2011 17:20:34 -0000 X-SWARE-Spam-Status: No, hits=-1.3 required=5.0 tests=AWL,BAYES_00,MSGID_FROM_MTA_HEADER,SPF_SOFTFAIL,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mtagate3.uk.ibm.com (HELO mtagate3.uk.ibm.com) (194.196.100.163) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 17 May 2011 17:20:20 +0000 Received: from d06nrmr1806.portsmouth.uk.ibm.com (d06nrmr1806.portsmouth.uk.ibm.com [9.149.39.193]) by mtagate3.uk.ibm.com (8.13.1/8.13.1) with ESMTP id p4HHKGVQ022123 for ; Tue, 17 May 2011 17:20:16 GMT Received: from d06av02.portsmouth.uk.ibm.com (d06av02.portsmouth.uk.ibm.com [9.149.37.228]) by d06nrmr1806.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id p4HHKGw92674700 for ; Tue, 17 May 2011 18:20:16 +0100 Received: from d06av02.portsmouth.uk.ibm.com (loopback [127.0.0.1]) by d06av02.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id p4HHKG9B029619 for ; Tue, 17 May 2011 11:20:16 -0600 Received: from tuxmaker.boeblingen.de.ibm.com (tuxmaker.boeblingen.de.ibm.com [9.152.85.9]) by d06av02.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with SMTP id p4HHKFLQ029615; Tue, 17 May 2011 11:20:15 -0600 Message-Id: <201105171720.p4HHKFLQ029615@d06av02.portsmouth.uk.ibm.com> Received: by tuxmaker.boeblingen.de.ibm.com (sSMTP sendmail emulation); Tue, 17 May 2011 19:20:15 +0200 Subject: Re: [try 2nd 4/8] Displaced stepping for Thumb 16-bit insn To: yao@codesourcery.com (Yao Qi) Date: Tue, 17 May 2011 17:20:00 -0000 From: "Ulrich Weigand" Cc: gdb-patches@sourceware.org In-Reply-To: <4DD28612.1090204@codesourcery.com> from "Yao Qi" at May 17, 2011 10:28:34 PM MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-05/txt/msg00382.txt.bz2 Yao Qi wrote: > > Have you looked at how the ARM case does it? There, we still have just > > a single POP { r0, ..., rN } that pops the right number of registers, > > and then the cleanup function (cleanup_block_load_pc) reshuffles them. > > It seems to me we could do the same (and actually use the same cleanup > > function) for the Thumb case too ... > > Sure, we can reuse that for Thumb case here. In this case, when > register list is not full, we could optimize it a little bit like what I > did in my last patch. However, it is a separate issue, and can be > addressed separately. OK, sounds good. > Support displaced stepping for Thumb 16-bit insns. > * arm-tdep.c (THUMB_NOP) Define. > (thumb_copy_unmodified_16bit): New. > (thumb_copy_b, thumb_copy_bx_blx_reg): New. > (thumb_copy_alu_reg): New. > (arm_copy_svc): Move some common code to ... > (install_svc): ... here. New. > (thumb_copy_svc): New. > (install_pc_relative): New. > (thumb_copy_pc_relative_16bit): New. > (thumb_decode_pc_relative_16bit): New. > (thumb_copy_16bit_ldr_literal): New. > (thumb_copy_cbnz_cbz): New. > (cleanup_pop_pc_16bit_all): New. > (thumb_copy_pop_pc_16bit): New. > (thumb_process_displaced_16bit_insn): New. > (thumb_process_displaced_32bit_insn): New. > (thumb_process_displaced_insn): process thumb instruction. I didn't find anything else :-) Thanks for your patience in working through all those iterations! This version is OK. Bye, Ulrich -- Dr. Ulrich Weigand GNU Toolchain for Linux on System z and Cell BE Ulrich.Weigand@de.ibm.com