Re: [PATCH v5] sim: bfin: new port

Mike Frysinger
2011-03-01T23:42:37Z

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On Tuesday, March 01, 2011 16:19:25 Pedro Alves wrote:
> On Tuesday 22 February 2011 20:26:44, Mike Frysinger wrote:
> > --- /dev/null
> > +++ b/sim/bfin/linux-fixed-code.h
> > @@ -0,0 +1,23 @@
> > +/* DO NOT EDIT: Autogenerated. */
> > +/* Fixed code region of Linux userspace starting at 0x400. Last
> > produced + from Linux-2.6.37 (not that the fixed code region changes
> > often). */ +static const unsigned char bfin_linux_fixed_code[] = {
> > +0x28, 0xe1, 0xad, 0x00, 0xa0, 0x00, 0x00, 0x20,
>
> (...)
>
> > +0xa4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > +};
>
> Now this kernel code in question was probably (haven't
> checked) largely written by ADI, and as such ADI could
> probably contribute a standalone version of its source
> to the FSF under GPLv3, along with some script or makefile
> that compiles it with a bfin-gcc and then generates
> the blob array. Or you could write simple dumb
> replacement implementations of the interface instead?

this code was written purely by ADI employees (2 or 3 of them to be exact), is
written in pure Blackfin assembly, and we've explicitly licensed this file
under GPLv2 or later. so i dont think this is an issue. it is not used by
the kernel at all ... the code is placed in a fixed location for userspace
binaries to call and is defined as part of the Blackfin ABI. see below.
-mike

/*
* This file contains sequences of code that will be copied to a
* fixed location, defined in <asm/fixed_code.h>. The interrupt
* handlers ensure that these sequences appear to be atomic when
* executed from userspace.
* These are aligned to 16 bytes, so that we have some space to replace
* these sequences with something else (e.g. kernel traps if we ever do
* BF561 SMP).
*
* Copyright 2007-2008 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/

#include <linux/linkage.h>
#include <linux/init.h>
#include <linux/unistd.h>
#include <asm/entry.h>

__INIT

ENTRY(_fixed_code_start)

.align 16
ENTRY(_sigreturn_stub)
P0 = __NR_rt_sigreturn;
EXCPT 0;
/* Speculative execution paranoia. */
0: JUMP.S 0b;
ENDPROC (_sigreturn_stub)

.align 16
/*
* Atomic swap, 8 bit.
* Inputs: P0: memory address to use
* R1: value to store
* Output: R0: old contents of the memory address, zero extended.
*/
ENTRY(_atomic_xchg32)
R0 = [P0];
[P0] = R1;
rts;
ENDPROC (_atomic_xchg32)

.align 16
/*
* Compare and swap, 32 bit.
* Inputs: P0: memory address to use
* R1: compare value
* R2: new value to store
* The new value is stored if the contents of the memory
* address is equal to the compare value.
* Output: R0: old contents of the memory address.
*/
ENTRY(_atomic_cas32)
R0 = [P0];
CC = R0 == R1;
IF !CC JUMP 1f;
[P0] = R2;
1:
rts;
ENDPROC (_atomic_cas32)

.align 16
/*
* Atomic add, 32 bit.
* Inputs: P0: memory address to use
* R0: value to add
* Outputs: R0: new contents of the memory address.
* R1: previous contents of the memory address.
*/
ENTRY(_atomic_add32)
R1 = [P0];
R0 = R1 + R0;
[P0] = R0;
rts;
ENDPROC (_atomic_add32)

.align 16
/*
* Atomic sub, 32 bit.
* Inputs: P0: memory address to use
* R0: value to subtract
* Outputs: R0: new contents of the memory address.
* R1: previous contents of the memory address.
*/
ENTRY(_atomic_sub32)
R1 = [P0];
R0 = R1 - R0;
[P0] = R0;
rts;
ENDPROC (_atomic_sub32)

.align 16
/*
* Atomic ior, 32 bit.
* Inputs: P0: memory address to use
* R0: value to ior
* Outputs: R0: new contents of the memory address.
* R1: previous contents of the memory address.
*/
ENTRY(_atomic_ior32)
R1 = [P0];
R0 = R1 | R0;
[P0] = R0;
rts;
ENDPROC (_atomic_ior32)

.align 16
/*
* Atomic and, 32 bit.
* Inputs: P0: memory address to use
* R0: value to and
* Outputs: R0: new contents of the memory address.
* R1: previous contents of the memory address.
*/
ENTRY(_atomic_and32)
R1 = [P0];
R0 = R1 & R0;
[P0] = R0;
rts;
ENDPROC (_atomic_and32)

.align 16
/*
* Atomic xor, 32 bit.
* Inputs: P0: memory address to use
* R0: value to xor
* Outputs: R0: new contents of the memory address.
* R1: previous contents of the memory address.
*/
ENTRY(_atomic_xor32)
R1 = [P0];
R0 = R1 ^ R0;
[P0] = R0;
rts;
ENDPROC (_atomic_xor32)

.align 16
/*
* safe_user_instruction
* Four NOPS are enough to allow the pipeline to speculativily load
* execute anything it wants. After that, things have gone bad, and
* we are stuck - so panic. Since we might be in user space, we can't
* call panic, so just cause a unhandled exception, this should cause
* a dump of the trace buffer so we can tell were we are, and a reboot
*/
ENTRY(_safe_user_instruction)
NOP; NOP; NOP; NOP;
EXCPT 0x4;
ENDPROC(_safe_user_instruction)

ENTRY(_fixed_code_end)

__FINIT

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