From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30927 invoked by alias); 28 Feb 2011 17:08:06 -0000 Received: (qmail 30918 invoked by uid 22791); 28 Feb 2011 17:08:05 -0000 X-SWARE-Spam-Status: No, hits=-1.3 required=5.0 tests=AWL,BAYES_00,MSGID_FROM_MTA_HEADER,SPF_SOFTFAIL,TW_EG,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mtagate1.uk.ibm.com (HELO mtagate1.uk.ibm.com) (194.196.100.161) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 28 Feb 2011 17:07:58 +0000 Received: from d06nrmr1806.portsmouth.uk.ibm.com (d06nrmr1806.portsmouth.uk.ibm.com [9.149.39.193]) by mtagate1.uk.ibm.com (8.13.1/8.13.1) with ESMTP id p1SH7tuW017519 for ; Mon, 28 Feb 2011 17:07:55 GMT Received: from d06av02.portsmouth.uk.ibm.com (d06av02.portsmouth.uk.ibm.com [9.149.37.228]) by d06nrmr1806.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id p1SH86sO1925300 for ; Mon, 28 Feb 2011 17:08:06 GMT Received: from d06av02.portsmouth.uk.ibm.com (loopback [127.0.0.1]) by d06av02.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id p1SH7sBV002790 for ; Mon, 28 Feb 2011 10:07:55 -0700 Received: from tuxmaker.boeblingen.de.ibm.com (tuxmaker.boeblingen.de.ibm.com [9.152.85.9]) by d06av02.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with SMTP id p1SH7rjs002745; Mon, 28 Feb 2011 10:07:53 -0700 Message-Id: <201102281707.p1SH7rjs002745@d06av02.portsmouth.uk.ibm.com> Received: by tuxmaker.boeblingen.de.ibm.com (sSMTP sendmail emulation); Mon, 28 Feb 2011 18:07:53 +0100 Subject: Re: [patch 2/3] Displaced stepping for 16-bit Thumb instructions To: yao@codesourcery.com (Yao Qi) Date: Mon, 28 Feb 2011 17:37:00 -0000 From: "Ulrich Weigand" Cc: gdb-patches@sourceware.org In-Reply-To: <4D6905C0.6030804@codesourcery.com> from "Yao Qi" at Feb 26, 2011 09:53:04 PM MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-02/txt/msg00915.txt.bz2 Yao Qi wrote: > +/* Record an ARM mode instruction in one slot. */ > +#define RECORD_ARM_MODE_INSN(INDEX, INSN) do \ > +{\ > + dsc->modinsn[INDEX] = INSN;\ > + } while (0) > + > +#define RECORD_THUMB_MODE_INSN(INDEX, INSN) do \ > +{\ > + dsc->modinsn[INDEX] = INSN;\ > + } while (0) > + > +/* Record the two parts of 32-bit Thumb-2 instruction. Each part occupies > + one array element. */ > +#define RECORD_THUMB2_MODE_INSN(INDEX, INSN1, INSN2) do \ > +{ \ > + dsc->modinsn[INDEX] = INSN1;\ > + dsc->modinsn[INDEX + 1] = INSN2;\ > +} while (0) OK, so at this point I think it's really not necessary to have those as macros in the first place. Instead, code should just continue to fill in dsc->modinsn, which will shorten this patch significantly :-) > @@ -5117,10 +5119,21 @@ displaced_read_reg (struct regcache *regs, CORE_ADDR from, int regno) > > if (regno == 15) > { > + /* Compute pipeline offset: > + - When executing an ARM instruction, PC reads as the address of the > + current instruction plus 8. > + - When executing a Thumb instruction, PC reads as the address of the > + current instruction plus 4. */ > + > + if (displaced_in_arm_mode (regs)) It would be somewhat nicer here to use dsc->is_thumb instead of re-computing its value. However, the displaced_read_reg function doesn't have the dsc argument, which is annoying (and asymmetrical to displaced_write_reg ...). So if you want to make the effort to change all call sites to pass in dsc, this would be nice, but I guess I'm also OK with doing it as above. > @@ -6904,23 +6919,49 @@ arm_displaced_init_closure (struct gdbarch *gdbarch, CORE_ADDR from, > CORE_ADDR to, struct displaced_step_closure *dsc) > { > struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); > - unsigned int i; > + unsigned int i, len, offset; > enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch); > + int size = dsc->insn_size; Ah, this is wrong: it needs to be "dsc->is_thumb? 2 : 4". Note that if the original instruction was 32-bit Thumb2, insn_size will be 4, but we still need to copy 2-byte chunks here. Otherwise, this looks OK to me now. Thanks for your continued effort to work on this feature! Bye, Ulrich -- Dr. Ulrich Weigand GNU Toolchain for Linux on System z and Cell BE Ulrich.Weigand@de.ibm.com