From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14360 invoked by alias); 9 Feb 2011 13:51:11 -0000 Received: (qmail 14351 invoked by uid 22791); 9 Feb 2011 13:51:10 -0000 X-SWARE-Spam-Status: No, hits=-1.3 required=5.0 tests=AWL,BAYES_00,MSGID_FROM_MTA_HEADER,SPF_SOFTFAIL,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mtagate4.uk.ibm.com (HELO mtagate4.uk.ibm.com) (194.196.100.164) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 09 Feb 2011 13:51:06 +0000 Received: from d06nrmr1707.portsmouth.uk.ibm.com (d06nrmr1707.portsmouth.uk.ibm.com [9.149.39.225]) by mtagate4.uk.ibm.com (8.13.1/8.13.1) with ESMTP id p19Dp26p017295 for ; Wed, 9 Feb 2011 13:51:02 GMT Received: from d06av02.portsmouth.uk.ibm.com (d06av02.portsmouth.uk.ibm.com [9.149.37.228]) by d06nrmr1707.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id p19Dp5o61429562 for ; Wed, 9 Feb 2011 13:51:05 GMT Received: from d06av02.portsmouth.uk.ibm.com (loopback [127.0.0.1]) by d06av02.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id p19Dp1rf002948 for ; Wed, 9 Feb 2011 06:51:02 -0700 Received: from tuxmaker.boeblingen.de.ibm.com (tuxmaker.boeblingen.de.ibm.com [9.152.85.9]) by d06av02.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with SMTP id p19Dp0qB002862; Wed, 9 Feb 2011 06:51:00 -0700 Message-Id: <201102091351.p19Dp0qB002862@d06av02.portsmouth.uk.ibm.com> Received: by tuxmaker.boeblingen.de.ibm.com (sSMTP sendmail emulation); Wed, 09 Feb 2011 14:51:00 +0100 Subject: Re: [patch] Fix PR tdep/12352: Handle str pc, [Rd, #imm] in displaced stepping To: yao@codesourcery.com (Yao Qi) Date: Wed, 09 Feb 2011 13:51:00 -0000 From: "Ulrich Weigand" Cc: Richard.Earnshaw@buzzard.freeserve.co.uk (Richard Earnshaw), gdb-patches@sourceware.org, julian@codesourcery.com In-Reply-To: <4D5230F9.7030703@codesourcery.com> from "Yao Qi" at Feb 09, 2011 02:15:21 PM MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-02/txt/msg00185.txt.bz2 Yao Qi wrote: > I am afraid they are not equal to each other. The intention of this > complicated insn sequence is used to compute the implementation-defined > constant offset of `str pc'. See more explanations below. > > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204g/Cihbjifh.html > > Section "Saving from r15" > [...] > If you do save from r15, the value saved is the address of the current > instruction, plus an implementation-defined constant. The constant is > always the same for a particular processor. > If your assembled code might be used on different processors, you can > find out what the constant is at runtime using code like the following: > > SUB R1, PC, #4 ; R1 = address of following STR instruction > STR PC, [R0] ; Store address of STR instruction + offset, > LDR R0, [R0] ; then reload it > SUB R0, R0, R1 ; Calculate the offset as the difference Yes, I'm aware of that. However, my understanding is that this special definition of STR PC applies to *all* variants of STR, including PUSH (PUSH { PC } is just another mnemonic for STR PC, [ SP, #-4 ]). If you look at the formal semantics definition in the ARM reference manual, all variants of STR (including PUSH) use the pseudo-code macro "PCStoreValue" to implement storing of the PC, which is defined to include the implementation-defined constant ... Bye, Ulrich -- Dr. Ulrich Weigand GNU Toolchain for Linux on System z and Cell BE Ulrich.Weigand@de.ibm.com