From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1890 invoked by alias); 9 Dec 2010 11:06:44 -0000 Received: (qmail 1880 invoked by uid 22791); 9 Dec 2010 11:06:43 -0000 X-SWARE-Spam-Status: No, hits=-2.1 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from sibelius.xs4all.nl (HELO glazunov.sibelius.xs4all.nl) (83.163.83.176) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 09 Dec 2010 11:06:37 +0000 Received: from glazunov.sibelius.xs4all.nl (kettenis@localhost [127.0.0.1]) by glazunov.sibelius.xs4all.nl (8.14.3/8.14.3) with ESMTP id oB9B6JG3031101; Thu, 9 Dec 2010 12:06:19 +0100 (CET) Received: (from kettenis@localhost) by glazunov.sibelius.xs4all.nl (8.14.3/8.14.3/Submit) id oB9B6HvF003270; Thu, 9 Dec 2010 12:06:17 +0100 (CET) Date: Thu, 09 Dec 2010 11:06:00 -0000 Message-Id: <201012091106.oB9B6HvF003270@glazunov.sibelius.xs4all.nl> From: Mark Kettenis To: kevinb@redhat.com CC: gdb-patches@sourceware.org In-reply-to: <20101208164657.7d9ce88e@mesquite.lan> (message from Kevin Buettner on Wed, 8 Dec 2010 16:46:57 -0700) Subject: Re: [RFC] mips-tdep.c: Update mips_register_to_value(), et al... References: <20101208164657.7d9ce88e@mesquite.lan> Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2010-12/txt/msg00108.txt.bz2 > Date: Wed, 8 Dec 2010 16:46:57 -0700 > From: Kevin Buettner > > Below is yet another patch that fixes a problem arising from the > simulator catching UNPREDICTABLE behavior. This time though, it's > for mips64 targets that are being run in 64-bit mode. (My earlier > two patches dealt with 32-bit mode.) > > When executing the command "set variable l = 4", GDB is writing to the > low 32 bits of the register containing `l'. The value was previously > -1. Writing only the low 32 bits with a positive value causes a > sign mismatch between the lower 32 bits and the upper 32 bits which > eventually causes the sim to abort back to GDB. The instruction > that causes the abort is the 32-bit addu instruction: > > => 0xffffffff800203a4 : addu v0,v1,v0 > (gdb) p/x $v0 > $8 = 0xfffffffffffffffe > (gdb) p/x $v1 > $9 = 0xffffffff00000004 > (gdb) si > UNPREDICTABLE: PC = 0x800203a4 > > (If the 64-bit daddu had been used instead, this abort would not have > been triggered.) > > The patch below adds a case to mips_value_to_register() to ensure that > sign extension is performed when writing a value shorter than 64-bits > to a 64-bit register. It updates mips_convert_register_p() and > mips_register_to_value() as well. > > Comments? So what if we were adding a 32-bit unsigned integer to a 64-bit integer signed integer? Then it would presumably be using the 64-bit daddu instruction, and sign extending the 32-bit value when placing it into the register would yield the wrong result wouldn't it? > (Can anyone think of better names for the two new functions that I > introduced?) Yeah, they're pretty horrific.