From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28343 invoked by alias); 22 Sep 2010 18:47:07 -0000 Received: (qmail 28329 invoked by uid 22791); 22 Sep 2010 18:47:06 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL,BAYES_00,MSGID_FROM_MTA_HEADER,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mtagate4.de.ibm.com (HELO mtagate4.de.ibm.com) (195.212.17.164) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 22 Sep 2010 18:46:58 +0000 Received: from d12nrmr1607.megacenter.de.ibm.com (d12nrmr1607.megacenter.de.ibm.com [9.149.167.49]) by mtagate4.de.ibm.com (8.13.1/8.13.1) with ESMTP id o8MIktic002656 for ; Wed, 22 Sep 2010 18:46:55 GMT Received: from d12av02.megacenter.de.ibm.com (d12av02.megacenter.de.ibm.com [9.149.165.228]) by d12nrmr1607.megacenter.de.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id o8MIknNN3334154 for ; Wed, 22 Sep 2010 20:46:55 +0200 Received: from d12av02.megacenter.de.ibm.com (loopback [127.0.0.1]) by d12av02.megacenter.de.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id o8MIkmIk003267 for ; Wed, 22 Sep 2010 20:46:49 +0200 Received: from tuxmaker.boeblingen.de.ibm.com (tuxmaker.boeblingen.de.ibm.com [9.152.85.9]) by d12av02.megacenter.de.ibm.com (8.12.11.20060308/8.12.11) with SMTP id o8MIklfl003240; Wed, 22 Sep 2010 20:46:47 +0200 Message-Id: <201009221846.o8MIklfl003240@d12av02.megacenter.de.ibm.com> Received: by tuxmaker.boeblingen.de.ibm.com (sSMTP sendmail emulation); Wed, 22 Sep 2010 20:46:47 +0200 Subject: [rfa] Fix software-watchpoint failures by adding epilogue detection To: gdb-patches@sourceware.org, rearnsha@arm.com Date: Wed, 22 Sep 2010 19:20:00 -0000 From: "Ulrich Weigand" MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2010-09/txt/msg00381.txt.bz2 Hello, I've been seeing failures in software watchpoint tests on ARM (Thumb-2), due to missing modeling of precise unwind states during function epilogues. This problem is well known from other architectures, and is usually fixed by skipping epilogue during sofware watchpoint single-stepping via the gdbarch_in_function_epilogue_p callback. However, ARM currently does not define this routine. The following patch adds an implementation that detects common Thumb epilogue sequences (ARM is missing, but could be added in an analogous way). This fixes the following test case failures: FAIL: gdb.base/recurse.exp: continue to second instance watchpoint, second time FAIL: gdb.base/recurse.exp: second instance watchpoint deleted when leaving scope (the program exited) FAIL: gdb.base/recurse.exp: continue to first instance watchpoint, second time (the program is no longer running) FAIL: gdb.base/recurse.exp: first instance watchpoint deleted when leaving scope (the program is no longer running) FAIL: gdb.base/watch-cond.exp: watchpoint with local expression, local condition evaluates in correct frame and adds: XPASS: gdb.mi/mi-watch.exp: sw: watchpoint trigger XPASS: gdb.mi/mi2-watch.exp: sw: watchpoint trigger Tested on armv7l-linux-gnueabi with no regressions. OK for mainline? Bye, Ulrich ChangeLog: * arm-tdep.c (arm_in_function_epilogue_p): New function. (arm_gdbarch_init): Install it. === modified file 'gdb/arm-tdep.c' --- gdb/arm-tdep.c 2010-08-30 15:33:03 +0000 +++ gdb/arm-tdep.c 2010-09-22 17:07:18 +0000 @@ -1686,6 +1686,87 @@ } } +/* Return true if we are in the function's epilogue, i.e. after the + instruction that destroyed the function's stack frame. + + We consider this to be the case if, starting from the current + instruction, we have a sequence of: + + - [optional] setting SP from the frame pointer + - restoring registers from SP [may include PC] + - a return-type instruction [if PC wasn't already restored] + + If we find anything else, we assume we're not in the epilogue. */ + +static int +arm_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) +{ + enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch); + + if (arm_pc_is_thumb (pc)) + { + for (;;) + { + unsigned int insn; + gdb_byte buf[2]; + + if (target_read_memory (pc, buf, 2)) + return 0; + + pc += 2; + insn = extract_unsigned_integer (buf, 2, byte_order_for_code); + + if (insn == 0x4770) /* bx lr */ + return 1; + else if (insn == 0x46f7) /* mov pc, lr */ + return 1; + else if (insn == 0x46bd) /* mov sp, r7 */ + ; + else if ((insn & 0xfe00) == 0xbc00) /* pop */ + { + if (insn & 0x0100) /* include PC. */ + return 1; + } + else if ((insn & 0xe000) == 0xe000) /* 32-bit Thumb-2 instruction */ + { + unsigned int insn2; + + if (target_read_memory (pc, buf, 2)) + return 0; + + pc += 2; + insn2 = extract_unsigned_integer (buf, 2, byte_order_for_code); + + if ((insn & 0xffdf) == 0xe89d) /* ldm.w sp{!}, */ + { + if (insn2 & 0x8000) /* include PC. */ + return 1; + } + else if (insn == 0xf85d /* ldr.w , [sp], #4 */ + && (insn2 & 0x0fff) == 0x0d04) + { + if ((insn2 & 0xf000) == 0xf000) /* is PC. */ + return 1; + } + else if ((insn & 0xffbf) == 0xecbd /* vldm sp!, */ + && (insn2 & 0x0e00) == 0x0a00) + ; + else + return 0; + } + else + return 0; + } + } + else + { + /* FIXME: We don't handle ARM for now. */ + } + + return 0; +} + + /* When arguments must be pushed onto the stack, they go on in reverse order. The code below implements a FILO (stack) to do this. */ @@ -6818,6 +6899,9 @@ /* Advance PC across function entry code. */ set_gdbarch_skip_prologue (gdbarch, arm_skip_prologue); + /* Detect whether PC is in function epilogue. */ + set_gdbarch_in_function_epilogue_p (gdbarch, arm_in_function_epilogue_p); + /* Skip trampolines. */ set_gdbarch_skip_trampoline_code (gdbarch, arm_skip_stub); -- Dr. Ulrich Weigand GNU Toolchain for Linux on System z and Cell BE Ulrich.Weigand@de.ibm.com