Re: [rx sim] add decode cache

[DJ Delorie <dj@redhat.com>]

> if the rx sim is ultimately built on top of opc2c, and you're
> caching the results of that, then shouldnt it be possible to keep
> the cache in a generic place where everyone using opc2c would be
> able to leverage it ?

Well, that depends on the memory management scheme that the simulator
is using.  In the RX case, it's using page tables, so when a page of
memory is allocated, the corresponding page of decode pointers is
allocated as well.  Technically, it's not a "cache" in that sense, as
we store *all* decodes, not just the LRU ones.

Plus, the information that's cached isn't the decode logic that opc2c
produces, it's the semantic logic that rx-decode.opc adds on top of
that.  Look at sim/m32c/m32c.opc for an alternate example.  The decode
is the same, but the semantics are completely different.

> also, on a semi-related note, i cant find any documentation or info
> in the archives on opc2c.  it seems to have been quietly merged with
> the rx port and not really given any public info.  looking at the rx
> opc file, it seems like it'd be useful to port some peeps over to
> it.

I agree.  I'm working on porting the m32c opcodes over to it, but so
many other things are higher on my priority list...

opc2c was originally used in my m32c simulator, but was undocumented
there too.  It's not RX-specific (not with two chips behind it) but it
is designed to decode CISC architectures, like the m32c, RX, or i386.
Specifically, cases where you don't know the length of the opcode
until you've started decoding it.

All it does, however, is build the decode logic and pull out the
operands.  It doesn't decode the semantics at all; it's just a way of
building a complex if/switch tree from some comments.