[PATCH 0/2] Support the new PPC476 processor

Sérgio Durigan Júnior
2009-12-16T20:48:49Z

Hello guys!

Long time no see! I have been following the e-mails on the list, but
unfortunately I was too busy to join any discussion. Well, hopefully now I
will be able to breath a little bit :-).

This series of patches implement the support for the new PowerPC 476 IBM
processor. This is an embedded processor with some nice debugging
capabilities, and I believe you will like to see the new types of
breakpoints/watchpoints implemented on GDB. Here's a brief explanation of the
new features, with some examples (credit goes to Luis Machado for this
explanation):

The following features are enabled by the patch:

* Hardware Watchpoints (separate items are mutually exclusive)
o 2 x Hardware Watchpoints with/without data value check
o 1 x Range Hardware Watchpoint
o 1 x Mask Hardware Watchpoint

* Hardware Breakpoints (separate items are mutually exclusive)
o 4 x Hardware Breakpoints
o 2 x Range Hardware Breakpoints

---= Hardware Watchpoints =---

* Simple Hardware Watchpoints: Monitors accesses to a single data address.
For the PPC476, 2 of them are available provided that no Range/Mask
watchpoints are being used. There is also the possibility of using conditions
when monitoring the values. In this case, GDB will place the condition inside
a register, and the evaluation will be hardware-accelerated, which will speed-
up significantly the debugging process. The PPC476 processor has two
registers that can be used to hardware-accelerate the condition evaluation.

- Available GDB commands: [r|a]watch <variable> (rwatch/awatch/watch) or
[r|a]watch <variable> if <variable> == <4-bytes unsigned constant>

- Usage example: awatch i / rwatch *0xbffff8e8 / watch i if i == 28

* Range Hardware Watchpoints: Monitors accesses to an interval of data
addresses. For the 476, a single Range Hardware Watchpoint can be used
provided that no Simple/Mask watchpoints are being used.

- Available GDB commands: [r|a]watch-range <address1>:<address2 | +<uint
length>>, where <address1> <= <address2> (rwatch-range/awatch-range/watch-
range)

- Usage example: watch-range &i,&k / awatch-range 0xbffff8e8,0xbffff8f8 /
rwatch-range 0xbffff8e8,+8

* Mask Hardware Watchpoints: Monitors accesses to data addresses that match
a specific pattern. For the 476, a single Mask Hardware Watchpoint can be
used provided that no Simple/Range watchpoints are being used. Due to the
processor's design, the precise data address of the watchpoint trigger is not
available, so the user must check the instruction that caused the trigger
(usually at PC - 4) to obtain such data address. With such data address in
hand, it's possible to tell if its contents have changed.

- Available GDB commands: [r|a]watch <variable | address> mask
<mask_value>

- Usage example: watch i mask 0xffffff00 / awatch *0xbffff8e8 mask
0xffffff00

Since the Simple/Range/Mask Hardware Watchpoints share the same register
set, the allowed combinations are as follows:

- 2 Simple Hardware Watchpoints with/without data value check

- 1 Range Hardware Watchpoint

- 1 Mask Hardware Watchpoint

---= Hardware Breakpoints =---

* Simple Hardware Breakpoint: Monitors a single instruction address.

- Available GDB commands: hbreak / hbreak <line number>

- Usage example: hbreak *0x10000658 / hbreak 20

* Range Hardware Breakpoint: Monitors an interval of instruction addresses.

- Available GDB commands: hbreak-range <address1>:<address2 | +<unsigned
int length>> where <address1> <= <address2> / hbreak-range <line number
start>:<line number end>

- Usage example: hbreak-range 0x10000658,0x10000660 / hbreak-range
0x10000658,+8 / hbreak-range 20,30

Since the Simple and Range variations share the same register set, the
allowed combinations of Simple Hardware Breakpoints (HW Break) and Range
Hardware Breakpoints (Range HW Break) are as follows:

- 4 HW Breaks

- 1 or 2 HW Breaks / 1 Range HW Break

- 2 Range HW Breaks

----

When you review the patches, you will notice that they use a few declarations,
defines and statements that do not exist yet. This is because we defined a
new interface with the kernel guys from IBM that provides such features. This
interface has been defined in collaboration with Benjamin Herrenschmidt (among
others), who is the current maintainer of the PowerPC kernel tree. Also, the
patch for this new interface has already been posted and is being reviewed by
the developers, and the comments received so far do not mention anything about
changing the interface, so it is guaranteed that this interface will be
accepted upstream as-is.

Unfortunately, this patch does not compile if the PowerPC machine doesn't have
the updated kernel (with the new interface), but we will fix it ASAP. I have
chosen to post it even with this problem in order to let you guys have time to
review and comment about the code.

It is also important to mention that I still have not written the
documentation for the new features, nor a testcase. I plan do that as the
review process occurs.

Please, let me know if there is anything unclear about this patch.

Best regards,

--
SÃ©rgio Durigan JÃºnior
Linux on Power Toolchain - Software Engineer
Linux Technology Center - LTC
IBM Brazil