From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26492 invoked by alias); 12 Oct 2008 13:39:02 -0000 Received: (qmail 26478 invoked by uid 22791); 12 Oct 2008 13:39:00 -0000 X-Spam-Check-By: sourceware.org Received: from sibelius.xs4all.nl (HELO sibelius.xs4all.nl) (82.92.89.47) by sourceware.org (qpsmtpd/0.31) with ESMTP; Sun, 12 Oct 2008 13:38:02 +0000 Received: from brahms.sibelius.xs4all.nl (kettenis@localhost.sibelius.xs4all.nl [127.0.0.1]) by brahms.sibelius.xs4all.nl (8.14.3/8.14.3) with ESMTP id m9CDbv0p015339; Sun, 12 Oct 2008 15:37:57 +0200 (CEST) Received: (from kettenis@localhost) by brahms.sibelius.xs4all.nl (8.14.3/8.14.3/Submit) id m9CDbu7Y031268; Sun, 12 Oct 2008 15:37:56 +0200 (CEST) Date: Sun, 12 Oct 2008 13:39:00 -0000 Message-Id: <200810121337.m9CDbu7Y031268@brahms.sibelius.xs4all.nl> From: Mark Kettenis To: hjl.tools@gmail.com CC: gdb-patches@sourceware.org In-reply-to: <6dc9ffc80810071221r10439dd2m886637a1dc7327ab@mail.gmail.com> (hjl.tools@gmail.com) Subject: Re: PATCH: Extend gdb remote protocol for AVX References: <20080918172728.GA12703@lucon.org> <200810021026.m92AQMqC006955@brahms.sibelius.xs4all.nl> <6dc9ffc80810020715o21079a0fn972cd30a94695f6c@mail.gmail.com> <200810042049.m94Kn3k8015088@brahms.sibelius.xs4all.nl> <20081004221325.GA6856@caradoc.them.org> <6dc9ffc80810050737r56b0d044vcf8e8f1368d2d03d@mail.gmail.com> <200810062135.m96LZI0H016325@brahms.sibelius.xs4all.nl> <6dc9ffc80810071221r10439dd2m886637a1dc7327ab@mail.gmail.com> Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2008-10/txt/msg00333.txt.bz2 > Date: Tue, 7 Oct 2008 12:21:19 -0700 > From: "H.J. Lu" > > On Mon, Oct 6, 2008 at 2:35 PM, Mark Kettenis wrote: > >> Date: Sun, 5 Oct 2008 07:37:13 -0700 > >> From: "H.J. Lu" > >> > >> On Sat, Oct 4, 2008 at 3:13 PM, Daniel Jacobowitz wrote: > >> >> I have no objection to the changes you proposed for the remote > >> >> protocol. But your diff also touches the core register stuff, and > >> >> that needs a bit more thought to make sure we don't surprise our > >> >> users. At that point, it may be easier to use the same model for the > >> >> remote protocol, where you transfer the top 128 bits of the %ymm > >> >> registers in addition to the %xmm registers. Adter all this is how > >> >> the hardware does it too (xsave is just an extension of fxsave). > >> > > >> > One way would be to transfer the xmm registers and then the remaining > >> > bits as unnamed registers; another, probably easier way would be to > >> > use an architecture specification or an actual register description to > >> > transfer just the ymm registers and let GDB know about that fact, so > >> > it can synthesize the xmm registers. > >> > > >> > (I don't remember the original patch, that may be what you're talking > >> > about already.) > >> > > >> > >> My proposal transfers the whole 256bit registers. We can display > >> xmm registers as the lower 128bit ymm registers if we can > >> display al/ax/eax. > > > > That certainly is a possibility, but if it is the right choice depends > > on quite a bit more things that just ease of implementation of the > > remote protocol. An important thing to check is what register numbers > > compilers (and GCC in particular) use for these registers. Are there > > compilers that already implement support for these new AVX > > instructions? > > Gcc 4.4 supports AVX. Gcc uses the same register number internally > for xmm0 and ymm0. It has no problems with register allocator. I guess that makes sense. Otherwise the register allocator might think it can use xmm0 independently from ymm0. > > We really should make sure the DWARF register number mapping in the > > AMD64 psABI gets updated for these new registers. Given the way the > > current mapping us defined for %stN and %mmN, it probably makes sense > > to give %ymmN their own numbers. > > > > The AVX x86-64 psABI extension is at > > http://gcc.gnu.org/ml/gcc/2008-06/msg00408.html > > The ia32 psABI extension is similar to SSE. The only difference is > __m256 requires 32byte alignment, instead of 16btye. And it doesn't mention the DWARF debug register mapping. That's sad. > I removed AVX register map: > > http://sourceware.org/ml/binutils/2008-08/msg00010.html > > since xmm/ymm registers are all caller-saved and there are > no xmm/ymm registers in unwind info. That's a mistake. Unwind info for signal handlers should mention xmm/ymm registers. Although I'm not sure how one would express the xsave layout in DWARF. > For debug info, we can tell ymm from xmm with data size. But what should "info address" display for a variable stored in a %ymm register? If we can't distinguish between the two, we'll probably end up printing %xmm.