From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 10849 invoked by alias); 28 Feb 2008 06:03:11 -0000 Received: (qmail 10841 invoked by uid 22791); 28 Feb 2008 06:03:10 -0000 X-Spam-Check-By: sourceware.org Received: from mtagate3.de.ibm.com (HELO mtagate3.de.ibm.com) (195.212.29.152) by sourceware.org (qpsmtpd/0.31) with ESMTP; Thu, 28 Feb 2008 06:02:44 +0000 Received: from d12nrmr1607.megacenter.de.ibm.com (d12nrmr1607.megacenter.de.ibm.com [9.149.167.49]) by mtagate3.de.ibm.com (8.13.8/8.13.8) with ESMTP id m1S62fv0223614 for ; Thu, 28 Feb 2008 06:02:41 GMT Received: from d12av02.megacenter.de.ibm.com (d12av02.megacenter.de.ibm.com [9.149.165.228]) by d12nrmr1607.megacenter.de.ibm.com (8.13.8/8.13.8/NCO v8.7) with ESMTP id m1S62f352285690 for ; Thu, 28 Feb 2008 07:02:41 +0100 Received: from d12av02.megacenter.de.ibm.com (loopback [127.0.0.1]) by d12av02.megacenter.de.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id m1S62eYE004155 for ; Thu, 28 Feb 2008 06:02:41 GMT Received: from tuxmaker.boeblingen.de.ibm.com (tuxmaker.boeblingen.de.ibm.com [9.152.85.9]) by d12av02.megacenter.de.ibm.com (8.12.11.20060308/8.12.11) with SMTP id m1S62eCo004152; Thu, 28 Feb 2008 06:02:40 GMT Message-Id: <200802280602.m1S62eCo004152@d12av02.megacenter.de.ibm.com> Received: by tuxmaker.boeblingen.de.ibm.com (sSMTP sendmail emulation); Thu, 28 Feb 2008 07:02:40 +0100 Subject: Re: [rfc][3/3] gdbserver bi-arch for ppc: enable bi-arch support To: drow@false.org (Daniel Jacobowitz) Date: Thu, 28 Feb 2008 07:16:00 -0000 From: "Ulrich Weigand" Cc: gdb-patches@sourceware.org In-Reply-To: <20080227131910.GC21538@caradoc.them.org> from "Daniel Jacobowitz" at Feb 27, 2008 08:19:10 AM X-Mailer: ELM [version 2.5 PL2] MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2008-02/txt/msg00464.txt.bz2 Daniel Jacobowitz wrote: > On Fri, Feb 08, 2008 at 02:11:22AM +0100, Ulrich Weigand wrote: > > + /* Only if the high bit of the MSR is set, we actually have > > + a 64-bit inferior. */ > > +#ifdef __ALTIVEC__ > > + collect_register_by_name ("msr", &msr); > > +#else > > + collect_register_by_name ("ps", &msr); > > +#endif > > + if (msr < 0) > > + return; > > +#endif > > This #ifdef can go away; in the manually written regformats files, > calls to collect_register_by_name are the only thing that rely on > the register name, so you could just rename it to msr. Ah, right. I've updated the patch accordingly. > Otherwise OK. Thanks; I've checked in the patch below. > > + /* OK, we have a 32-bit inferior. */ > > +#ifdef __ALTIVEC__ > > + init_registers_powerpc_32 (); > > +#else > > +#ifdef __SPE__ > > + init_registers_powerpc_e500 (); > > +#else > > + init_registers_ppc (); > > +#endif > > +#endif > > I hope we can autodetect AltiVec and SPE too... Maybe we have to > resort to checking the inferior's auxv? Agreed. I'll see if I can put a patch along those lines together. However, I don't have any non-AltiVec or SPE systems available; would you be able to test on those? Bye, Ulrich ChangeLog: * regformats/reg-ppc.dat: Rename "ps" to "msr". * regformats/reg-ppc64.dat: Likewise. gdbserver/ChangeLog: * configure.srv [powerpc64-*-linux*]: Add all files mentioned for powerpc-*-linux* to srv_regobj and reg_xmlfiles. * linux-ppc-low.c (ppc_get_pc): Support bi-arch operation. (ppc_set_pc): Likewise. (ppc_arch_setup): New function. (ppc_fill_gregset): Call ppc_collect_ptrace_register instead of collect_register. (the_low_target): Use ppc_arch_setup as arch_setup initializer. diff -urNp gdb-orig/gdb/gdbserver/configure.srv gdb-head/gdb/gdbserver/configure.srv --- gdb-orig/gdb/gdbserver/configure.srv 2008-02-28 04:44:34.000000000 +0100 +++ gdb-head/gdb/gdbserver/configure.srv 2008-02-28 06:01:43.048973708 +0100 @@ -106,12 +106,17 @@ case "${target}" in srv_linux_usrregs=yes srv_linux_thread_db=yes ;; - powerpc64-*-linux*) srv_regobj="reg-ppc64.o powerpc-64.o" + powerpc64-*-linux*) srv_regobj="reg-ppc.o powerpc-32.o powerpc-e500.o" + srv_regobj="${srv_regobj} reg-ppc64.o powerpc-64.o" srv_tgtobj="linux-low.o linux-ppc-low.o" - srv_xmlfiles="rs6000/powerpc-64.xml" + srv_xmlfiles="rs6000/powerpc-32.xml" srv_xmlfiles="${srv_xmlfiles} rs6000/power-altivec.xml" - srv_xmlfiles="${srv_xmlfiles} rs6000/power64-core.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/power-core.xml" srv_xmlfiles="${srv_xmlfiles} rs6000/power-fpu.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-e500.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/power-spe.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-64.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/power64-core.xml" srv_linux_usrregs=yes srv_linux_regsets=yes srv_linux_thread_db=yes diff -urNp gdb-orig/gdb/gdbserver/linux-ppc-low.c gdb-head/gdb/gdbserver/linux-ppc-low.c --- gdb-orig/gdb/gdbserver/linux-ppc-low.c 2008-02-28 04:44:34.000000000 +0100 +++ gdb-head/gdb/gdbserver/linux-ppc-low.c 2008-02-28 06:03:17.532729696 +0100 @@ -138,18 +138,65 @@ ppc_supply_ptrace_register (int regno, c static CORE_ADDR ppc_get_pc (void) { - unsigned long pc; - - collect_register_by_name ("pc", &pc); - return (CORE_ADDR) pc; + if (register_size (0) == 4) + { + unsigned int pc; + collect_register_by_name ("pc", &pc); + return (CORE_ADDR) pc; + } + else + { + unsigned long pc; + collect_register_by_name ("pc", &pc); + return (CORE_ADDR) pc; + } } static void ppc_set_pc (CORE_ADDR pc) { - unsigned long newpc = pc; + if (register_size (0) == 4) + { + unsigned int newpc = pc; + supply_register_by_name ("pc", &newpc); + } + else + { + unsigned long newpc = pc; + supply_register_by_name ("pc", &newpc); + } +} + +static void +ppc_arch_setup (void) +{ +#ifdef __powerpc64__ + long msr; - supply_register_by_name ("pc", &newpc); + /* On a 64-bit host, assume 64-bit inferior process. */ +#ifdef __ALTIVEC__ + init_registers_powerpc_64 (); +#else + init_registers_ppc64 (); +#endif + + /* Only if the high bit of the MSR is set, we actually have + a 64-bit inferior. */ + collect_register_by_name ("msr", &msr); + if (msr < 0) + return; +#endif + + /* OK, we have a 32-bit inferior. */ +#ifdef __ALTIVEC__ + init_registers_powerpc_32 (); +#else +#ifdef __SPE__ + init_registers_powerpc_e500 (); +#else + init_registers_ppc (); +#endif +#endif } /* Correct in either endianness. @@ -179,10 +226,10 @@ static void ppc_fill_gregset (void *buf) int i; for (i = 0; i < 32; i++) - collect_register (i, (char *) buf + ppc_regmap[i]); + ppc_collect_ptrace_register (i, (char *) buf + ppc_regmap[i]); for (i = 64; i < 70; i++) - collect_register (i, (char *) buf + ppc_regmap[i]); + ppc_collect_ptrace_register (i, (char *) buf + ppc_regmap[i]); } #ifdef __ALTIVEC__ @@ -285,23 +332,7 @@ struct regset_info target_regsets[] = { }; struct linux_target_ops the_low_target = { -#ifdef __powerpc64__ -#ifdef __ALTIVEC__ - init_registers_powerpc_64, -#else - init_registers_ppc64, -#endif -#else -#ifdef __ALTIVEC__ - init_registers_powerpc_32, -#else -#ifdef __SPE__ - init_registers_powerpc_e500, -#else - init_registers_ppc, -#endif -#endif -#endif + ppc_arch_setup, ppc_num_regs, ppc_regmap, ppc_cannot_fetch_register, diff -urNp gdb-orig/gdb/regformats/reg-ppc64.dat gdb-head/gdb/regformats/reg-ppc64.dat --- gdb-orig/gdb/regformats/reg-ppc64.dat 2008-02-27 23:18:38.000000000 +0100 +++ gdb-head/gdb/regformats/reg-ppc64.dat 2008-02-28 06:02:20.651277210 +0100 @@ -67,7 +67,7 @@ expedite:r1,pc 64:f31 64:pc -64:ps +64:msr 32:cr 64:lr diff -urNp gdb-orig/gdb/regformats/reg-ppc.dat gdb-head/gdb/regformats/reg-ppc.dat --- gdb-orig/gdb/regformats/reg-ppc.dat 2002-04-11 22:30:08.000000000 +0200 +++ gdb-head/gdb/regformats/reg-ppc.dat 2008-02-28 06:02:06.287084193 +0100 @@ -67,7 +67,7 @@ expedite:r1,pc 64:f31 32:pc -32:ps +32:msr 32:cr 32:lr -- Dr. Ulrich Weigand GNU Toolchain for Linux on System z and Cell BE Ulrich.Weigand@de.ibm.com