From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28085 invoked by alias); 22 Oct 2007 16:07:55 -0000 Received: (qmail 28067 invoked by uid 22791); 22 Oct 2007 16:07:53 -0000 X-Spam-Check-By: sourceware.org Received: from miranda.se.axis.com (HELO miranda.se.axis.com) (193.13.178.8) by sourceware.org (qpsmtpd/0.31) with ESMTP; Mon, 22 Oct 2007 16:07:50 +0000 Received: from ignucius.se.axis.com (ignucius.se.axis.com [10.83.5.18]) by miranda.se.axis.com (8.13.4/8.13.4/Debian-3sarge3) with ESMTP id l9MG7kPr019885; Mon, 22 Oct 2007 18:07:46 +0200 Received: from ignucius.se.axis.com (localhost [127.0.0.1]) by ignucius.se.axis.com (8.12.8p1/8.12.8/Debian-2woody1) with ESMTP id l9MG7kbH020797; Mon, 22 Oct 2007 18:07:46 +0200 Received: (from hp@localhost) by ignucius.se.axis.com (8.12.8p1/8.12.8/Debian-2woody1) id l9MG7kCa020793; Mon, 22 Oct 2007 18:07:46 +0200 Date: Mon, 22 Oct 2007 16:09:00 -0000 Message-Id: <200710221607.l9MG7kCa020793@ignucius.se.axis.com> From: Hans-Peter Nilsson To: edgar.iglesias@axis.com CC: binutils@sourceware.org, gdb-patches@sourceware.org, hans-peter.nilsson@axis.com In-reply-to: <20071003145848.GG16132@edgar.underground.se.axis.com> Subject: Re: [PATCH] CRIS sim and it's testsuite Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2007-10/txt/msg00507.txt.bz2 (Binutils CC:ed, because it's the official home, which might otherwise seem odd for a simulator-only CGEN port.) > Date: Wed, 3 Oct 2007 16:58:48 +0200 > From: "Edgar E. Iglesias" > The change introduces regressions in the tests for movu.b and > movu.w, I verified with real CRISv32 hw that the test cases > are OK so this seems to be an error in the simulator. Indeed. Thanks for the analysis and sorry about the delay. > I had a > quick look at the cgen descriptions but saw no obvious errors, > zero-extension seems do be done correctly for movu so I can't > see why the N flag would get set. Yeah, I had to stare at it a few minutes too. It's not obvious until you see it. :-] A copy of the original operand isn't much good for "testing" the zero-extended N flag even if you call it "newval". I adjusted movs too for consistency. Note that the other movs/movu insns (with non-register source) already do the right thing. I regtested with the gcc testsuite for a month-old tree I had convenient. Next: the testsuite patches. src/cpu: * cris.cpu (movs, movu): Use result of extension operation when updating flags. Most or all generated files changed because of some formatting change (not the GPLv3 one) in the template, though the only operational change is in cris/semcrisv{10,32}f-switch.c. src/sim: * cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c, cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c, cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c, cris/decodev10.h, cris/decodev32.c, cris/decodev32.h, cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c, cris/semcrisv32f-switch.c: Regenerate. [Diff for generated files elided.] Index: cris.cpu =================================================================== RCS file: /cvs/src/src/cpu/cris.cpu,v retrieving revision 1.6 diff -p -u -r1.6 cris.cpu --- cris.cpu 5 Jul 2007 09:49:03 -0000 1.6 +++ cris.cpu 22 Oct 2007 15:51:25 -0000 @@ -2033,9 +2033,10 @@ (.pmacro (BW) (sequence - ((BW newval)) - (set newval Rs) - (set Rd (ext SI newval)) + ((BW tmpops) (SI newval)) + (set tmpops Rs) + (set newval (ext SI tmpops)) + (set Rd newval) (setf-move SI newval))) ) @@ -2060,9 +2061,10 @@ (.pmacro (BW) (sequence - ((BW newval)) - (set newval Rs) - (set Rd (zext SI newval)) + ((BW tmpops) (SI newval)) + (set tmpops Rs) + (set newval (zext SI tmpops)) + (set Rd newval) (setf-move SI newval))) ) brgds, H-P