From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 19630 invoked by alias); 15 Mar 2006 22:39:59 -0000 Received: (qmail 19619 invoked by uid 22791); 15 Mar 2006 22:39:58 -0000 X-Spam-Check-By: sourceware.org Received: from sibelius.xs4all.nl (HELO sibelius.xs4all.nl) (82.92.89.47) by sourceware.org (qpsmtpd/0.31) with ESMTP; Wed, 15 Mar 2006 22:39:57 +0000 Received: from elgar.sibelius.xs4all.nl (root@elgar.sibelius.xs4all.nl [192.168.0.2]) by sibelius.xs4all.nl (8.13.4/8.13.4) with ESMTP id k2FMdrLx002233 for ; Wed, 15 Mar 2006 23:39:53 +0100 (CET) Received: from elgar.sibelius.xs4all.nl (kettenis@localhost.sibelius.xs4all.nl [127.0.0.1]) by elgar.sibelius.xs4all.nl (8.13.4/8.13.3) with ESMTP id k2FMdrcY020934 for ; Wed, 15 Mar 2006 23:39:53 +0100 (CET) Received: (from kettenis@localhost) by elgar.sibelius.xs4all.nl (8.13.4/8.13.4/Submit) id k2FMdrRI012844; Wed, 15 Mar 2006 23:39:53 +0100 (CET) Date: Wed, 15 Mar 2006 23:00:00 -0000 Message-Id: <200603152239.k2FMdrRI012844@elgar.sibelius.xs4all.nl> From: Mark Kettenis To: gdb-patches@sourceware.org In-reply-to: <20060315164507.GA16396@nevyn.them.org> (message from Daniel Jacobowitz on Wed, 15 Mar 2006 11:45:07 -0500) Subject: Re: [commit] 128-bit long double for mips64-linux References: <20060315164507.GA16396@nevyn.them.org> Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2006-03/txt/msg00206.txt.bz2 > Date: Wed, 15 Mar 2006 11:45:07 -0500 > From: Daniel Jacobowitz > > This patch adds support for the IEEE 128-bit long double format used > on MIPS/Linux. IRIX does something different, so I didn't touch that > (I can't test IRIX). > > There's something fishy about floating point results on N32 in my latest > testing, but this is still an improvement - without it we get errors > trying to print 128-bit types for which we have no floatformat set. > > Tested on mips64-linux and committed. What's up with the mips-tdep.c change? Your ChangeLog doesn't mention it, but it seems you committed it. > > -- > Daniel Jacobowitz > CodeSourcery > > 2006-03-15 Daniel Jacobowitz > > * mips-linux-tdep.c: Include "floatformat.h". > (mips_linux_init_abi): Use 128-bit long double for N32 and N64. > (mips_n32n64_return_value): Support 128-bit long double. > (print_gp_register_row): Don't print spaces before ignored > or floating point registers. > > Index: src/gdb/mips-linux-tdep.c > =================================================================== > --- src.orig/gdb/mips-linux-tdep.c 2006-03-14 15:44:19.000000000 -0500 > +++ src/gdb/mips-linux-tdep.c 2006-03-14 16:48:33.000000000 -0500 > @@ -32,6 +32,7 @@ > #include "regcache.h" > #include "trad-frame.h" > #include "tramp-frame.h" > +#include "floatformat.h" > > /* Copied from . */ > #define ELF_NGREG 45 > @@ -1110,6 +1111,15 @@ mips_linux_init_abi (struct gdbarch_info > set_solib_svr4_fetch_link_map_offsets > (gdbarch, svr4_ilp32_fetch_link_map_offsets); > set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr); > + set_gdbarch_long_double_bit (gdbarch, 128); > + /* These floatformats should probably be renamed. MIPS uses > + the same 128-bit IEEE floating point format that IA-64 uses, > + except that the quiet/signalling NaN bit is reversed (GDB > + does not distinguish between quiet and signalling NaNs). */ > + if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) > + set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big); > + else > + set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_little); > tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe); > break; > case MIPS_ABI_N64: > @@ -1118,6 +1128,15 @@ mips_linux_init_abi (struct gdbarch_info > set_solib_svr4_fetch_link_map_offsets > (gdbarch, svr4_lp64_fetch_link_map_offsets); > set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr); > + set_gdbarch_long_double_bit (gdbarch, 128); > + /* These floatformats should probably be renamed. MIPS uses > + the same 128-bit IEEE floating point format that IA-64 uses, > + except that the quiet/signalling NaN bit is reversed (GDB > + does not distinguish between quiet and signalling NaNs). */ > + if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) > + set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big); > + else > + set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_little); > tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe); > break; > default: > Index: src/gdb/mips-tdep.c > =================================================================== > --- src.orig/gdb/mips-tdep.c 2006-03-14 15:44:19.000000000 -0500 > +++ src/gdb/mips-tdep.c 2006-03-14 17:05:07.000000000 -0500 > @@ -1,7 +1,7 @@ > /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger. > > Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, > - 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 > + 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 > Free Software Foundation, Inc. > > Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU > @@ -2911,6 +2911,24 @@ mips_n32n64_return_value (struct gdbarch > || TYPE_LENGTH (type) > 2 * mips_abi_regsize (gdbarch)) > return RETURN_VALUE_STRUCT_CONVENTION; > else if (TYPE_CODE (type) == TYPE_CODE_FLT > + && TYPE_LENGTH (type) == 16 > + && tdep->mips_fpu_type != MIPS_FPU_NONE) > + { > + /* A 128-bit floating-point value fills both $f0 and $f2. The > + two registers are used in the same as memory order, so the > + eight bytes with the lower memory address are in $f0. */ > + if (mips_debug) > + fprintf_unfiltered (gdb_stderr, "Return float in $f0 and $f2\n"); > + mips_xfer_register (regcache, > + NUM_REGS + mips_regnum (current_gdbarch)->fp0, > + 8, TARGET_BYTE_ORDER, readbuf, writebuf, 0); > + mips_xfer_register (regcache, > + NUM_REGS + mips_regnum (current_gdbarch)->fp0 + 2, > + 8, TARGET_BYTE_ORDER, readbuf ? readbuf + 8 : readbuf, > + writebuf ? writebuf + 8 : writebuf, 0); > + return RETURN_VALUE_REGISTER_CONVENTION; > + } > + else if (TYPE_CODE (type) == TYPE_CODE_FLT > && tdep->mips_fpu_type != MIPS_FPU_NONE) > { > /* A floating-point value belongs in the least significant part > @@ -4037,7 +4055,6 @@ print_gp_register_row (struct ui_file *f > int regnum; > > /* For GP registers, we print a separate row of names above the vals */ > - fprintf_filtered (file, " "); > for (col = 0, regnum = start_regnum; > col < ncols && regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) > { > @@ -4046,11 +4063,17 @@ print_gp_register_row (struct ui_file *f > if (TYPE_CODE (gdbarch_register_type (gdbarch, regnum)) == > TYPE_CODE_FLT) > break; /* end the row: reached FP register */ > + if (col == 0) > + fprintf_filtered (file, " "); > fprintf_filtered (file, > mips_abi_regsize (current_gdbarch) == 8 ? "%17s" : "%9s", > REGISTER_NAME (regnum)); > col++; > } > + > + if (col == 0) > + return regnum; > + > /* print the R0 to R31 names */ > if ((start_regnum % NUM_REGS) < MIPS_NUMREGS) > fprintf_filtered (file, "\n R%-4d", start_regnum % NUM_REGS); > Index: src/gdb/Makefile.in > =================================================================== > --- src.orig/gdb/Makefile.in 2006-03-14 15:47:19.000000000 -0500 > +++ src/gdb/Makefile.in 2006-03-14 17:06:11.000000000 -0500 > @@ -2299,7 +2299,7 @@ mips-linux-nat.o: mips-linux-nat.c $(def > mips-linux-tdep.o: mips-linux-tdep.c $(defs_h) $(gdbcore_h) $(target_h) \ > $(solib_svr4_h) $(osabi_h) $(mips_tdep_h) $(gdb_string_h) \ > $(gdb_assert_h) $(frame_h) $(regcache_h) $(trad_frame_h) \ > - $(tramp_frame_h) > + $(tramp_frame_h) $(floatformat_h) > mips-mdebug-tdep.o: mips-mdebug-tdep.c $(defs_h) $(frame_h) $(mips_tdep_h) \ > $(trad_frame_h) $(block_h) $(symtab_h) $(objfiles_h) $(elf_mips_h) \ > $(elf_bfd_h) $(gdb_assert_h) $(frame_unwind_h) $(frame_base_h) \ >