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Date: Wed, 01 Dec 2004 18:14:00 -0000
From: Randolph Chung <randolph@tausq.org>
To: Andrew Cagney <cagney@gnu.org>, gdb-patches@sources.redhat.com
Subject: Re: [patch/RFA] multiarch INSTRUCTION_NULLIFIED
Message-ID: <20041201181356.GI6359@tausq.org>
Reply-To: Randolph Chung <randolph@tausq.org>
References: <41AA2D08.3030304@gnu.org> <20041129033013.GJ6359@tausq.org> <41AB3C1D.80509@gnu.org> <20041201061924.GZ6359@tausq.org> <20041201171137.GA8037@nevyn.them.org> <20041201171712.GE6359@tausq.org> <20041201171910.GA8771@nevyn.them.org> <20041201172530.GF6359@tausq.org> <20041201172811.GA9227@nevyn.them.org> <20041201173516.GH6359@tausq.org>
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> does anybody know how ia64 works in this area? if you have an
> if-converted series of instruction and we single step through the
> region, what happens?

it's a bit hard to tell what is happening, because the ia64-gdb seems to
be rather broken.... but it seems to have problems stepping through code
like this:

int foo(int a)
{
        if (a > 10) {
                x = 1;
                y = 2;
                z = 3;
        } else {
                x = 11;
                y = 12;
                z = 13;
        }

        return x + y + z;
}

with a bit of optimization, gcc turns this into:

        .loc 1 5 0
        cmp4.ge p6, p7 = 10, r32
        .loc 1 4 0
        addl r8 = @gprel(x#), gp
        addl r16 = @gprel(y#), gp
        .mmi
        addl r15 = @gprel(z#), gp
        ;;
        .loc 1 6 0
        (p7) addl r8 = @gprel(x#), gp
        (p7) addl r14 = 1, r0
        .mii
        .loc 1 10 0
        (p6) addl r14 = 11, r0
        .loc 1 7 0
        (p7) addl r16 = @gprel(y#), gp
        ;;
        .loc 1 8 0
        (p7) addl r15 = @gprel(z#), gp
        .mii
        .loc 1 10 0
        (p6) st4 [r8] = r14
        [...]

gdb gets very confused about this :)

randolph
-- 
Randolph Chung
Debian GNU/Linux Developer, hppa/ia64 ports
http://www.tausq.org/