From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4605 invoked by alias); 11 Oct 2004 01:39:37 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 4580 invoked from network); 11 Oct 2004 01:39:36 -0000 Received: from unknown (HELO takamaka.act-europe.fr) (142.179.108.108) by sourceware.org with SMTP; 11 Oct 2004 01:39:36 -0000 Received: by takamaka.act-europe.fr (Postfix, from userid 507) id E679D47D98; Sun, 10 Oct 2004 18:39:34 -0700 (PDT) Date: Mon, 11 Oct 2004 01:39:00 -0000 From: Joel Brobecker To: Andrew Cagney Cc: gdb-patches@sources.redhat.com Subject: Re: [RFA/mips] Remove mips16 code that seems redundant Message-ID: <20041011013934.GX26446@gnat.com> References: <20041011011652.GW26446@gnat.com> <4169E35C.2050007@gnu.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4169E35C.2050007@gnu.org> User-Agent: Mutt/1.4i X-SW-Source: 2004-10/txt/msg00179.txt.bz2 > This? Ah, bummer, keep forgetting the patch (that's because my mind is already further ahead - sorry). Here is the patch: Index: mips-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/mips-tdep.c,v retrieving revision 1.328 diff -u -p -r1.328 mips-tdep.c --- mips-tdep.c 11 Oct 2004 01:00:57 -0000 1.328 +++ mips-tdep.c 11 Oct 2004 01:10:54 -0000 @@ -2409,36 +2409,6 @@ mips16_heuristic_proc_desc (CORE_ADDR st this_cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->pc] = this_cache->saved_regs[NUM_REGS + RA_REGNUM]; } - - /* The MIPS16 entry instruction saves $s0 and $s1 in the reverse - order of that normally used by gcc. Therefore, we have to fetch - the first instruction of the function, and if it's an entry - instruction that saves $s0 or $s1, correct their saved addresses. */ - /* FIXME: brobecker/2004-10-10: This code was moved here from - mips_insn16_frame_cache(), but can be merged with the block above - handling entry_inst. Will be done in a separate pass, to make changes - more atomic. Actually, this code seems completely redundant! */ - { - ULONGEST inst = mips16_fetch_instruction (start_pc); - if ((inst & 0xf81f) == 0xe809 && (inst & 0x700) != 0x700) /* entry */ - { - int reg; - int sreg_count = (inst >> 6) & 3; - CORE_ADDR reg_position = (this_cache->base); - - /* Check if the ra register was pushed on the stack. */ - if (inst & 0x20) - reg_position -= mips_abi_regsize (current_gdbarch); - - /* Check if the s0 and s1 registers were pushed on the stack. */ - /* NOTE: cagney/2004-02-08: Huh? This is doing no such check. */ - for (reg = 16; reg < sreg_count + 16; reg++) - { - this_cache->saved_regs[NUM_REGS + reg].addr = reg_position; - reg_position -= mips_abi_regsize (current_gdbarch); - } - } - } } /* Mark all the registers as unset in the saved_regs array > /* The entry instruction is typically the first instruction in a > function, > and it stores registers at offsets relative to the value of the old SP > (before the prologue). But the value of the sp parameter to this > function is the new SP (after the prologue has been executed). So we > can't calculate those offsets until we've seen the entire prologue, > and can calculate what the old SP must have been. */ > if (entry_inst != 0) > { > int areg_count = (entry_inst >> 8) & 7; > int sreg_count = (entry_inst >> 6) & 3; > > /* The entry instruction always subtracts 32 from the SP. */ > PROC_FRAME_OFFSET (&temp_proc_desc) += 32; > > /* Now we can calculate what the SP must have been at the > start of the function prologue. */ > sp += PROC_FRAME_OFFSET (&temp_proc_desc); > > /* Check if a0-a3 were saved in the caller's argument save area. */ > for (reg = 4, offset = 0; reg < areg_count + 4; reg++) > { > PROC_REG_MASK (&temp_proc_desc) |= 1 << reg; > set_reg_offset (this_cache, reg, sp + offset); > offset += mips_abi_regsize (current_gdbarch); > } > > /* Check if the ra register was pushed on the stack. */ > offset = -4; > if (entry_inst & 0x20) > { > PROC_REG_MASK (&temp_proc_desc) |= 1 << RA_REGNUM; > set_reg_offset (this_cache, RA_REGNUM, sp + offset); > offset -= mips_abi_regsize (current_gdbarch); > } > > /* Check if the s0 and s1 registers were pushed on the stack. */ > for (reg = 16; reg < sreg_count + 16; reg++) > { > PROC_REG_MASK (&temp_proc_desc) |= 1 << reg; > set_reg_offset (this_cache, reg, sp + offset); > offset -= mips_abi_regsize (current_gdbarch); > } > } > > yes, the code should have only one loop. Which loop where you refering to? -- Joel