From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 24163 invoked by alias); 18 Mar 2004 20:55:15 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 24154 invoked from network); 18 Mar 2004 20:55:14 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sources.redhat.com with SMTP; 18 Mar 2004 20:55:14 -0000 Received: from int-mx2.corp.redhat.com (nat-pool-rdu-dmz.redhat.com [172.16.52.200] (may be forged)) by mx1.redhat.com (8.12.10/8.12.10) with ESMTP id i2IKtC4b004742 for ; Thu, 18 Mar 2004 15:55:12 -0500 Received: from localhost (vpn50-45.rdu.redhat.com [172.16.50.45]) by int-mx2.corp.redhat.com (8.11.6/8.11.6) with ESMTP id i2IKt5M05519; Thu, 18 Mar 2004 15:55:10 -0500 Received: from rsandifo by localhost with local (Exim 3.35 #1) id 1B44YW-0006MY-00; Thu, 18 Mar 2004 20:55:56 +0000 To: cgd@broadcom.com Cc: gdb-patches@sources.redhat.com Subject: Re: [rfa/mips] Second go at vr5500 hilo hazard fix References: <87oequw5xw.fsf@redhat.com> From: Richard Sandiford Date: Fri, 19 Mar 2004 00:09:00 -0000 In-Reply-To: (cgd@broadcom.com's message of "18 Mar 2004 09:56:52 -0800") Message-ID: <87znadvpr7.fsf@redhat.com> User-Agent: Gnus/5.1006 (Gnus v5.10.6) Emacs/21.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-RedHat-Spam-Score: 0 X-SW-Source: 2004-03/txt/msg00434.txt.bz2 Message-ID: <20040319000900.7-2rUvoOmeFFs7Eij6r_tYob_GU-iDsjIXgHffuRvyo@z> cgd@broadcom.com writes: > Now that the mips sim 'multi' bits are in place (including good > default), and we have MIPS_MACH(SD) (thanks! 8-), it should be > possible to code a simple macro which checks for the appropriate bfd > machine, and decides whether interlocks are present. Well, I had a similar check in: http://sources.redhat.com/ml/gdb-patches/2002-11/msg00642.html OK, so it wasn't wrapped up in a nice macro, it just checked the architecture directly: + /* There are no timing requirements in vr5500 code. */ + if (MIPS_MACH (SD) == bfd_mach_mips5500) + return 1; But that was exactly what Andrew objected to: http://sources.redhat.com/ml/gdb-patches/2002-11/msg00668.html Then there was: http://sources.redhat.com/ml/gdb-patches/2002-12/msg00080.html To quote: As for having to tag each individual entry in the .igen file with an explicit CPU. Yes, that sux. However, I also believe that it has significantly reduced the overall error rate (no more breaking one target by editing another) and that benefit vastly outweighs the short term pain. Richard