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From: Joern Rennecke <joern.rennecke@superh.com>
To: msnyder@redhat.com (Michael Snyder)
Cc: joern.rennecke@superh.com (Joern Rennecke),
	amylaar@fairadsl.co.uk (Joern Rennecke),
	gdb-patches@sources.redhat.com
Subject: Re: [RFA] sh-sim loose ends
Date: Fri, 13 Feb 2004 12:29:00 -0000	[thread overview]
Message-ID: <200402131229.i1DCTHN16278@linsvr1.uk.superh.com> (raw)
In-Reply-To: <402C11C6.1090404@redhat.com> from "Michael Snyder" at Feb 12, 2004 03:52:38

> Hmmm?  I thought 'L' was for registers, and 'MA' was for memory access.
> This is the only instruction that modifies a gpr but doesn't call 'L'.
> Figured it was an oversight.

No, MA is for the memory *access conflict* between data access and
instruction fetch for the non/unified cache SH[123], while L is for
the memory access *latency* on SH[123].

And, of course, there is also no L for "mov <REG_M>,<REG_N>".

> Actually I was just going for consistancy (everywhere else that
> modifies nip uses SET_NIP).  I'll gladly drop this part of the
> patch if you don't like it.

Well, I don't like it because it adds more code unnecessarily, thus
increasing the working set.
And it isn't really inconsistent; SET_NIP is used when nip is changed
for something other than linear instruction fetch, so that we know
if we'll sooner hit a loop boundary or the end of memory.
ppi_insn and the profile trap just do linear instruction fetch for
larger instructions; sleep / trap 0xc3 re-fetches the same instruction
again.


  reply	other threads:[~2004-02-13 12:29 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-02-12 21:56 Michael Snyder
2004-02-12 22:39 ` Joern Rennecke
2004-02-12 23:52   ` Michael Snyder
2004-02-13 12:29     ` Joern Rennecke [this message]
2004-02-13 19:17       ` Michael Snyder
2004-02-14  4:48         ` Joern Rennecke

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