Re: [RFA] Add sh4a to sh-sim (2nd iteration)

[Joern Rennecke <joern.rennecke@superh.com>]

> Shall we commit it as is for now, and save speed improvements
> for a later round?

Ok.

> >>*************** op ppi_tab[] =
> >>*** 1379,1385 ****
> >>      "COMPUTE_OVERFLOW;",
> >>      "greater_equal = 0;",
> >>    },
> >>!   { "","", "pmuls Se,Sf,Dg",	"0100eeffxxyygguu",
> >>      "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
> >>      "if (res == 0x80000000)",
> >>      "  res = 0x7fffffff;",
> >>--- 1581,1587 ----
> >>      "COMPUTE_OVERFLOW;",
> >>      "greater_equal = 0;",
> >>    },
> >>!   { "","", "pmuls Se,Sf,Dg",	"0100eeff0000gguu",
> >>      "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
> >>      "if (res == 0x80000000)",
> >>      "  res = 0x7fffffff;",
> > 
> > 
> > According to the sh2-dsp manual that is still at the Renesas web site,
> > the xx / yy fields are still present in the pmuls instruction.
> 
> Hmm, well, are they used for anything?  I think I took them out to
> resolve a conflict with another insn (but I don't remember for sure).
> Since there's no corresponding register parameter, and the code
> does not use them -- is there any harm?  If the other patterns
> are not used now, they probably will be someday.

According to the manual, because of the ignored x,y,u operands, there are
64 valid pmuls opcodes for each e,f,g combination.  I can't find anything
in the manual that says that any one of these opcodes is preferred.
If there is a conflict, it appears that the sh4a-dsp is not actually
backward compatible with the sh3-dsp, and we'll need another opcode table
modification depending on bfd_get_mach.  OTOH I seem to remember that we
were asked to zero unused fields in the assembler, but that might be just
to get reproducible results.  You should probably ask Renesas for
clarification.
> 
> 
> 
> >>    printf ("ppi_insn (iword)\n");
> >>    printf ("     int iword;\n");
> >>    printf ("{\n");
> >>+   printf ("  /* 'ee' = [x0, x1, y0, a1] (FIXME [x0, x1, a1, m1]) */\n");
> >>    printf ("  static char e_tab[] = { 8,  9, 10,  5};\n");
> >>+   printf ("  /* 'ff' = [y0, y1, x0, a1] (FIXME [y0, y1, a1, m1]) */\n");
> >>    printf ("  static char f_tab[] = {10, 11,  8,  5};\n");
> >>+   printf ("  /* 'xx'(?) = [x0, x1, a0, a1]  */\n");
> >>    printf ("  static char x_tab[] = { 8,  9,  7,  5};\n");
> >>+   printf ("  /* 'yy'(?) = [y0, y1, m0, m1]  */\n");
> >>    printf ("  static char y_tab[] = {10, 11, 12, 14};\n");
> >>+   printf ("  /* 'gg' = [m0, m1, a0, a1]  */\n");
> >>    printf ("  static char g_tab[] = {12, 14,  7,  5};\n");
> >>+   printf ("  /* 'uu' = [x0, y0, a0, a1]  (FIXME [m1, x1, a0, a1]) */\n");
> >>    printf ("  static char u_tab[] = { 8, 10,  7,  5};\n");
> > 
> > 
> > What are these FIXMEs supposed to mean?
> 
> I did this work 4 months ago.  Probably  I thought the
> comment was wrong, and that the actual set of registers
> was as shown.  Your second opinion would be appreciated.

The first part of the comments is right, the FIXMEs are wrong.  The
registers are numbered like in the movs instruction which is the same
as in the the Dz parameter, with A1G / A0G having a number 8 higher
than A1 / A0.  See also the macros in interp.c after DSR_R.