From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1964 invoked by alias); 8 Jan 2004 16:15:15 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 1932 invoked from network); 8 Jan 2004 16:15:13 -0000 Received: from unknown (HELO smtp.uk.superh.com) (193.128.105.170) by sources.redhat.com with SMTP; 8 Jan 2004 16:15:13 -0000 Received: from sh-uk-ex01.uk.w2k.superh.com (sh-uk-ex01 [192.168.16.17]) by smtp.uk.superh.com (8.12.10/8.12.10) with ESMTP id i08GF3Fa000401; Thu, 8 Jan 2004 16:15:04 GMT Received: from linsvr1.uk.superh.com ([192.168.16.50]) by sh-uk-ex01.uk.w2k.superh.com with Microsoft SMTPSVC(5.0.2195.6713); Thu, 8 Jan 2004 16:16:23 +0000 Received: (from renneckej@localhost) by linsvr1.uk.superh.com (8.11.6/8.11.6) id i08GF1M05415; Thu, 8 Jan 2004 16:15:01 GMT From: Joern Rennecke Message-Id: <200401081615.i08GF1M05415@linsvr1.uk.superh.com> Subject: Re: [RFA] Add sh4a to sh-sim (2nd iteration) To: msnyder@redhat.com (Michael Snyder) Date: Thu, 08 Jan 2004 16:15:00 -0000 Cc: joern.rennecke@superh.com, amylaar@fairadsl.co.uk, andrew.stubbs@superh.com, gdb-patches@sources.redhat.com In-Reply-To: <3FFC8098.7080000@redhat.com> from "Michael Snyder" at Jan 07, 2004 01:56:40 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 08 Jan 2004 16:16:23.0806 (UTC) FILETIME=[C281A1E0:01C3D602] X-Scanned-By: MIMEDefang 2.39 X-SW-Source: 2004-01/txt/msg00208.txt.bz2 > (expand_ppi_code): Flatten loop for simplicity, tweak for 12-bit > instead of 8-bit table (some insns are ambiguous to 8 bits). You are converting iteration into recursion - I don't see what is flat about deep recursion. > --- gencode.c 7 Jan 2004 21:38:26 -0000 > *************** > *** 1,4 **** > ! /* Simulator/Opcode generator for the Hitachi Super-H architecture. > > Written by Steve Chamberlain of Cygnus Support. > sac@cygnus.com > --- 1,5 ---- > ! /* Simulator/Opcode generator for the Renesas > ! (formerly Hitachi) Super-H architecture. > > Written by Steve Chamberlain of Cygnus Support. > sac@cygnus.com That should be Renesas (formerly Hitachi) / SuperH Inc SuperH architecture. > + /* sh4a */ > + { "", "", "ftrv ", "1111vv0111111101", > + "if (FPSCR_PR)", > + " RAISE_EXCEPTION (SIGILL);", > + "else", > + "{", > + " /* FIXME not implemented. */", > + " printf (\"ftrv xmtrx, FV%d\\n\", v1);", > + "}", > + }, ftrv is an sh4 instruction. > { "n", "n", "ldc.l @+,DBR", "0100nnnn11110110", > "MA (1);", > "DBR = RLAT (R[n]);", > "R[n] += 4;", > "/* FIXME: user mode */", > }, > ! { "n", "n", "ldc.l @+,DBR", "0100nnnn11110110", > ! "if (SR_MD)", > ! "{ /* priv mode */", > ! " MA (1);", > ! " DBR = RLAT (R[n]);", > ! " R[n] += 4;", > ! "}", > ! "else", > ! " RAISE_EXCEPTION (SIGILL); /* user mode */", > ! }, Why do you keep the old "ldc.l @+,DBR" version around? > ! { "", "mn", "mul.l ,", "0000nnnnmmmm0111", > ! "MACL = ((int) R[n]) * ((int) R[m]);", > }, The #if 0 was left there as a reminder that the casts to int are not fully portable. The casts should be replaced with the SEXT32 macro. > ! { "", "n", "movx.w @,", "111100xyXY0001??", > "DSP_R (m) = RSWAT (R[n]) << 16;", > ! "if (iword & 3)", > ! " {", > ! " iword &= 0xfd53; goto top;", > ! " }", > ! }, I think I understand the way the new move instructions were added a bit better now. The implementation could be made faster by having the movx/nopy patterns separate, but I suppose speed is not such an issue for sh-dsp simulation, seeing that we don't have time-intensive testcases that use dsp move instructions. > *************** op ppi_tab[] = > *** 1379,1385 **** > "COMPUTE_OVERFLOW;", > "greater_equal = 0;", > }, > ! { "","", "pmuls Se,Sf,Dg", "0100eeffxxyygguu", > "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;", > "if (res == 0x80000000)", > " res = 0x7fffffff;", > --- 1581,1587 ---- > "COMPUTE_OVERFLOW;", > "greater_equal = 0;", > }, > ! { "","", "pmuls Se,Sf,Dg", "0100eeff0000gguu", > "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;", > "if (res == 0x80000000)", > " res = 0x7fffffff;", According to the sh2-dsp manual that is still at the Renesas web site, the xx / yy fields are still present in the pmuls instruction. > printf ("ppi_insn (iword)\n"); > printf (" int iword;\n"); > printf ("{\n"); > + printf (" /* 'ee' = [x0, x1, y0, a1] (FIXME [x0, x1, a1, m1]) */\n"); > printf (" static char e_tab[] = { 8, 9, 10, 5};\n"); > + printf (" /* 'ff' = [y0, y1, x0, a1] (FIXME [y0, y1, a1, m1]) */\n"); > printf (" static char f_tab[] = {10, 11, 8, 5};\n"); > + printf (" /* 'xx'(?) = [x0, x1, a0, a1] */\n"); > printf (" static char x_tab[] = { 8, 9, 7, 5};\n"); > + printf (" /* 'yy'(?) = [y0, y1, m0, m1] */\n"); > printf (" static char y_tab[] = {10, 11, 12, 14};\n"); > + printf (" /* 'gg' = [m0, m1, a0, a1] */\n"); > printf (" static char g_tab[] = {12, 14, 7, 5};\n"); > + printf (" /* 'uu' = [x0, y0, a0, a1] (FIXME [m1, x1, a0, a1]) */\n"); > printf (" static char u_tab[] = { 8, 10, 7, 5};\n"); What are theses FIXMEs supposed to mean?