From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 2369 invoked by alias); 15 Dec 2003 19:03:39 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 2287 invoked from network); 15 Dec 2003 19:03:37 -0000 Received: from unknown (HELO smtp.uk.superh.com) (193.128.105.170) by sources.redhat.com with SMTP; 15 Dec 2003 19:03:37 -0000 Received: from sh-uk-ex01.uk.w2k.superh.com (sh-uk-ex01 [192.168.16.17]) by smtp.uk.superh.com (8.12.10/8.12.10) with ESMTP id hBFJ3RFa009721; Mon, 15 Dec 2003 19:03:27 GMT Received: from linsvr1.uk.superh.com ([192.168.16.50]) by sh-uk-ex01.uk.w2k.superh.com with Microsoft SMTPSVC(5.0.2195.6713); Mon, 15 Dec 2003 19:04:40 +0000 Received: (from renneckej@localhost) by linsvr1.uk.superh.com (8.11.6/8.11.6) id hBFJ3Q418425; Mon, 15 Dec 2003 19:03:26 GMT Received: from sh-uk-ex01.uk.w2k.superh.com [192.168.16.17] by localhost with IMAP (fetchmail-5.9.0) for renneckej@localhost (single-drop); Mon, 15 Dec 2003 14:45:06 +0000 (GMT) Received: from sh-us-ex01.us.w2k.superh.com ([192.168.4.40]) by sh-uk-ex01.uk.w2k.superh.com with Microsoft SMTPSVC(5.0.2195.6713); Mon, 15 Dec 2003 14:46:05 +0000 Received: from chloe.uk.w2k.superh.com ([192.168.17.40]) by sh-us-ex01.us.w2k.superh.com with Microsoft SMTPSVC(5.0.2195.6713); Mon, 15 Dec 2003 06:46:03 -0800 Received: (from renneckej@localhost) by chloe.uk.w2k.superh.com (8.11.6/8.11.6) id hBFEiX821417; Mon, 15 Dec 2003 14:44:33 GMT From: Joern Rennecke Message-Id: <200312151444.hBFEiX821417@chloe.uk.w2k.superh.com> Subject: Re: [RFA] SH4A contribution for sim To: msnyder@redhat.com (Michael Snyder) Date: Mon, 15 Dec 2003 19:03:00 -0000 Cc: msnyder@redhat.com (Michael Snyder), gdb-patches@sources.redhat.com, joern.rennecke@superh.com, andrew.stubbs@superh.com, amylaar@spamcop.net In-Reply-To: <3FD92A7A.7040206@redhat.com> from "Michael Snyder" at Dec 11, 2003 06:39:54 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 15 Dec 2003 14:46:03.0443 (UTC) FILETIME=[29CDE030:01C3C31A] X-Scanned-By: MIMEDefang 2.39 X-SW-Source: 2003-12/txt/msg00378.txt.bz2 > > Michael Snyder wrote: > > Here are my changes to support simulation of the sh4a. > > J"oern? Any comment? > > { > > int m, mv; > > > > + /* J"orn Rennecke: "Allow variable length n / m fields". > > + I'm not sure if I understand these two lines. MVS */ > > if (s[1] - '0' > 1U || !s[2] || ! s[3]) > > expand_opcode (shift - 1, val + s[0] - '0', i, s + 1); > > + The code above handles a single binary digit if it appears as one of the last three characters, or in front of a non-binary character (e.g. the 'i' in 'i8*1....'). This is because handling the three 'n's in 'nnn0' leaves one extra binary digit. E.g. for fsca, after 'nnn', the nibbles 0111 and 1110 are processed, leaving '1'. I didn't want to process single bits all the time because that requires some changes in patterns that recognize binary/letter combinations. On the other hand, you seem to be doing that right now anyway. And expanding these combinations is making this code ever harder to maintain. I think the only sane way forward is to handle variable-length binary fields - i.e. make a loop to see how much we got and build up the number as we go. The position dependent template fragments where the 'xx' and 'yy' for movx/movy, which you changed to 'xy' and 'yx'. We can use this chage to xy/yx to make the detection position-independent, or check the shift parameter. rather, that should be a count of bits that remain to be processed - subtracting 4 at the start doesn't make much sense if you don't process nibbles all the time. > > + /* 01xy -- 4 way fork across xy. */ > > + else if (s[2] == 'x' && s[3] == 'y') > > + for (j = 0; j < 4; j++) > > + expand_opcode (shift - 4, val | m | (j << shift), i, s + 4); > > + /* 01xx -- 2x32 fork across x0 and nopy. */ This does not just go across nopy (that would be pointless), but across nopy and movy. By replacing all the 'xx' in movx templates with 'xy' and doing a vanilla expansion for 'xy' above, you disable generation of case labels for movx/movy combinations. Then you made tons of other changes to compensate for this. I see not point in these changes. > > + case 'd': > > + /* Double register dr0-dr14 (even numbers only). */ > > + /* ddd0 -- 8 way fork. */ > > + val |= bton (s) << shift; > > + for (j = 0; j < 15; j += 2) > > + expand_opcode (shift - 4, val | (j << shift), i, s + 4); > > + break; What is that for? I don't see why we should have a separate ddd0 pattern, where nnn0 works just fine and also makes it much clearer where the number ends up. It's also more efficient when the simulator doesn't do any unnecessary runtime checks on the opcodes. The even-numbered registers generate legal instruction encodings. The odd-numbered ones are left over for the default case. If you want to make sure that they raise a SIGILL exception, you can do this by initializing table accordingly.