From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3734 invoked by alias); 15 Nov 2003 17:56:53 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 3718 invoked from network); 15 Nov 2003 17:56:49 -0000 Received: from unknown (HELO walton.kettenis.dyndns.org) (213.93.115.144) by sources.redhat.com with SMTP; 15 Nov 2003 17:56:49 -0000 Received: from elgar.kettenis.dyndns.org (elgar.kettenis.dyndns.org [192.168.0.2]) by walton.kettenis.dyndns.org (8.12.6p3/8.12.6) with ESMTP id hAFHumhj000435 for ; Sat, 15 Nov 2003 18:56:48 +0100 (CET) (envelope-from kettenis@elgar.kettenis.dyndns.org) Received: from elgar.kettenis.dyndns.org (localhost [127.0.0.1]) by elgar.kettenis.dyndns.org (8.12.6p3/8.12.6) with ESMTP id hAFHumYL032982 for ; Sat, 15 Nov 2003 18:56:48 +0100 (CET) (envelope-from kettenis@elgar.kettenis.dyndns.org) Received: (from kettenis@localhost) by elgar.kettenis.dyndns.org (8.12.6p3/8.12.6/Submit) id hAFHumsb032979; Sat, 15 Nov 2003 18:56:48 +0100 (CET) Date: Sat, 15 Nov 2003 17:56:00 -0000 Message-Id: <200311151756.hAFHumsb032979@elgar.kettenis.dyndns.org> From: Mark Kettenis To: gdb-patches@sources.redhat.com Subject: [PATCH/SPARC] Add support for double precision FP registers X-SW-Source: 2003-11/txt/msg00323.txt.bz2 This adds $d0 ... $d30 as double precision floating-point (pseudo) registers. Committed to the SPARC branch. Mark Index: ChangeLog from Mark Kettenis * sparc-tdep.c (sparc32_register_names): Remove trailing comma. (sparc32_pseudo_register_names): New variable. (SPARC32_NUM_PSEUDO_REGS): New define. (sparc32_register_name): Add support for psuedo-registers. (sparc32_register_type): Add support double precision floating-point registers. (sparc32_pseudo_register_read, sparc32_pseudo_register_write): New functions. (sparc32_gdbarch_init): Set num_pseudo_regs, pseudo_register_read and pseudo_register_write. * sparc-tdep.h (sparc32_regnum): Add SPARC32_D0_REGNUM and SPARC32_D30_REGNUM. Index: sparc-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/sparc-tdep.c,v retrieving revision 1.127.2.5 diff -u -p -r1.127.2.5 sparc-tdep.c --- sparc-tdep.c 7 Nov 2003 21:46:10 -0000 1.127.2.5 +++ sparc-tdep.c 15 Nov 2003 17:53:56 -0000 @@ -197,12 +197,24 @@ static const char *sparc32_register_name "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", - "y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr", + "y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr" }; /* Total number of registers. */ #define SPARC32_NUM_REGS ARRAY_SIZE (sparc32_register_names) +/* We provide the aliases %d0..%d30 for the floating registers as + "psuedo" registers. */ + +static const char *sparc32_pseudo_register_names[] = +{ + "d0", "d2", "d4", "d6", "d8", "d10", "d12", "d14", + "d16", "d18", "d20", "d22", "d24", "d26", "d28", "d30" +}; + +/* Total number of pseudo registers. */ +#define SPARC32_NUM_PSEUDO_REGS ARRAY_SIZE (sparc32_pseudo_register_names) + /* Return the name of register REGNUM. */ static const char * @@ -211,6 +223,9 @@ sparc32_register_name (int regnum) if (regnum >= 0 && regnum < SPARC32_NUM_REGS) return sparc32_register_names[regnum]; + if (regnum < SPARC32_NUM_REGS + SPARC32_NUM_PSEUDO_REGS) + return sparc32_pseudo_register_names[regnum - SPARC32_NUM_REGS]; + return NULL; } @@ -223,6 +238,9 @@ sparc32_register_type (struct gdbarch *g if (regnum >= SPARC_F0_REGNUM && regnum <= SPARC_F31_REGNUM) return builtin_type_float; + if (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM) + return builtin_type_double; + if (regnum == SPARC_SP_REGNUM || regnum == SPARC_FP_REGNUM) return builtin_type_void_data_ptr; @@ -232,6 +250,31 @@ sparc32_register_type (struct gdbarch *g return builtin_type_int32; } +static void +sparc32_pseudo_register_read (struct gdbarch *gdbarch, + struct regcache *regcache, + int regnum, void *buf) +{ + gdb_assert (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM); + + regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC32_D0_REGNUM); + regcache_raw_read (regcache, regnum, buf); + regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4); +} + +static void +sparc32_pseudo_register_write (struct gdbarch *gdbarch, + struct regcache *regcache, + int regnum, const void *buf) +{ + gdb_assert (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM); + + regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC32_D0_REGNUM); + regcache_raw_write (regcache, regnum, buf); + regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4); +} + + static CORE_ADDR sparc32_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR funcaddr, int using_gcc, @@ -934,6 +977,9 @@ sparc32_gdbarch_init (struct gdbarch_inf set_gdbarch_num_regs (gdbarch, SPARC32_NUM_REGS); set_gdbarch_register_name (gdbarch, sparc32_register_name); set_gdbarch_register_type (gdbarch, sparc32_register_type); + set_gdbarch_num_pseudo_regs (gdbarch, SPARC32_NUM_PSEUDO_REGS); + set_gdbarch_pseudo_register_read (gdbarch, sparc32_pseudo_register_read); + set_gdbarch_pseudo_register_write (gdbarch, sparc32_pseudo_register_write); /* Register numbers of various important registers. */ set_gdbarch_sp_regnum (gdbarch, SPARC_SP_REGNUM); /* %sp */ Index: sparc-tdep.h =================================================================== RCS file: /cvs/src/src/gdb/sparc-tdep.h,v retrieving revision 1.3.10.4 diff -u -p -r1.3.10.4 sparc-tdep.h --- sparc-tdep.h 2 Nov 2003 17:05:07 -0000 1.3.10.4 +++ sparc-tdep.h 15 Nov 2003 17:53:56 -0000 @@ -111,7 +111,12 @@ enum sparc32_regnum SPARC32_PC_REGNUM, /* %pc */ SPARC32_NPC_REGNUM, /* %npc */ SPARC32_FSR_REGNUM, /* %fsr */ - SPARC32_CSR_REGNUM /* %csr */ + SPARC32_CSR_REGNUM, /* %csr */ + + /* Pseudo registers. */ + SPARC32_D0_REGNUM, /* %d0 */ + SPARC32_D30_REGNUM /* %d30 */ + = SPARC32_D0_REGNUM + 15 };