From: Joern Rennecke <joern.rennecke@superh.com>
To: ac131313@redhat.com (Andrew Cagney)
Cc: joern.rennecke@superh.com (Joern Rennecke),
gdb-patches@sources.redhat.com
Subject: Re: RFA: add fsrra and fsca instructions to SH simulator (resend)
Date: Fri, 31 Oct 2003 15:40:00 -0000 [thread overview]
Message-ID: <200310311540.h9VFe5l08263@linsvr3.uk.superh.com> (raw)
In-Reply-To: <3FA26D65.7080108@redhat.com> from "Andrew Cagney" at Oct 31, 2003 09:10:45
> > 2003-10-24 J"orn Rennecke <joern.rennecke@superh.com>
> >
> > * interp.c (fsca_s, fsrra_s): New functions.
> > * gencode.c (tab): Add entries for fsca and fsrra.
> > (expand_opcode): Allow variable length n / m fields.
>
> Is it possible for this code to use the far more portable sim-fpu?
The entire SH3E / SH4 simulator in sim/sh already uses native floating point,
so making just these two instructions use sim-fpu would be pointless.
Converting the entire simulator would of course be possible, but I don't
see any pressing need to do this now. We have far more urgent issues
with SH5 support in gcc and gdb that we should address first.
next prev parent reply other threads:[~2003-10-31 15:40 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-10-31 13:49 Joern Rennecke
2003-10-31 14:10 ` Andrew Cagney
2003-10-31 15:40 ` Joern Rennecke [this message]
2003-10-31 16:09 ` Andrew Cagney
2003-10-31 16:15 ` Joern Rennecke
2003-10-31 16:38 ` Andrew Cagney
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