From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11753 invoked by alias); 9 Sep 2003 12:49:57 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 11746 invoked from network); 9 Sep 2003 12:49:55 -0000 Received: from unknown (HELO cam-admin0.cambridge.arm.com) (193.131.176.54) by sources.redhat.com with SMTP; 9 Sep 2003 12:49:55 -0000 Received: from pc960.cambridge.arm.com (pc960.cambridge.arm.com [10.1.205.4]) by cam-admin0.cambridge.arm.com (8.9.3/8.9.3) with ESMTP id NAA18257; Tue, 9 Sep 2003 13:49:54 +0100 (BST) Received: from pc960.cambridge.arm.com (rearnsha@localhost) by pc960.cambridge.arm.com (8.11.6/8.9.3) with ESMTP id h89Cnsn25311; Tue, 9 Sep 2003 13:49:54 +0100 Message-Id: <200309091249.h89Cnsn25311@pc960.cambridge.arm.com> X-Authentication-Warning: pc960.cambridge.arm.com: rearnsha owned process doing -bs To: Jerome Guitton cc: Richard.Earnshaw@arm.com, gdb-patches@sources.redhat.com Reply-To: Richard.Earnshaw@arm.com Organization: ARM Ltd. X-Telephone: +44 1223 400569 (direct+voicemail), +44 1223 400400 (switchbd) X-Fax: +44 1223 400410 X-Address: ARM Ltd., 110 Fulbourn Road, Cherry Hinton, Cambridge CB1 9NJ. X-Url: http://www.arm.com/ Subject: Re: [RFA] ARM : prologue scan In-reply-to: Your message of "Tue, 09 Sep 2003 12:23:15 +0200." <20030909102315.GQ26104@act-europe.fr> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Tue, 09 Sep 2003 12:49:00 -0000 From: Richard Earnshaw X-SW-Source: 2003-09/txt/msg00155.txt.bz2 > Richard Earnshaw (rearnsha@arm.com): > > > > 2003-07-21 J. Guitton > > > > > > * arm-tdep.c (arm_skip_prologue): Add the handling of "sub ip, sp #n" > > > and "add ip, sp #n", as these instructions can be found in a ATPCS > > > compliant prologue. > > > (arm_scan_prologue): Ditto. > > > > Secondly, and this applies only to the ChangeLog entry itself, this entry > > sequence is nothing to do with the ATPCS (the A*T*PCS doesn't even > > sanction the use of a frame pointer). > > You are right. I got confused by these comments: > > The APCS (ARM Procedure Call Standard) defines the following > prologue: > > mov ip, sp > [stmfd sp!, {a1,a2,a3,a4}] > stmfd sp!, {...,fp,ip,lr,pc} > [stfe f7, [sp, #-12]!] > [stfe f6, [sp, #-12]!] > [stfe f5, [sp, #-12]!] > [stfe f4, [sp, #-12]!] > sub fp, ip, #nn @@ nn == 20 or 4 depending on second insn */ > > I didn't see this definition in the ARM Thumb Procedure Call Standard... > Is the ARM Procedure Call Standard a different document? If so, what is > its status (Does the ATPCS make the APCS obsolete?) and where can I find > it? > The APCS is obsolete (it predates Thumb), you might find some documents on the web if you look hard enough, but I wouldn't bet on it these days. Nevertheless, it's what ARM/Linux is currently based upon, so its usage is not. ARM/Linux substantially uses the minor variant APCS-R, but updated for use on 32-bit mode. R.