From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 27425 invoked by alias); 27 Jun 2003 20:25:56 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 27408 invoked from network); 27 Jun 2003 20:25:54 -0000 Received: from unknown (HELO mailhost.intrinsity.com) (208.246.32.130) by sources.redhat.com with SMTP; 27 Jun 2003 20:25:54 -0000 Received: from victoria.intrinsity.com (victoria.eng.intrinsity.com [192.168.1.29]) by mailhost.intrinsity.com (Postfix) with ESMTP id 6AF433F3B3; Fri, 27 Jun 2003 15:25:53 -0500 (CDT) Received: from bletchley.vert.intrinsity.com (bletchley.vert.intrinsity.com [192.168.3.33]) by victoria.intrinsity.com (Postfix) with ESMTP id 1C17E4586C; Fri, 27 Jun 2003 15:25:53 -0500 (CDT) Received: by bletchley.vert.intrinsity.com (Postfix, from userid 621) id A18648B5FD; Fri, 27 Jun 2003 20:25:52 +0000 (UTC) Subject: Re: [RFA] Eliminate hard coded constant num_regs in mips_gdbarch_init To: ac131313@redhat.com (Andrew Cagney) Date: Fri, 27 Jun 2003 20:25:00 -0000 Cc: fnf@intrinsity.com (Fred Fish), gdb-patches@sources.redhat.com Reply-To: fnf@intrinsity.com (Fred Fish) In-Reply-To: <3EFCA0B3.3020308@redhat.com> from "Andrew Cagney" at Jun 27, 2003 03:53:23 PM MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-Id: <20030627202552.A18648B5FD@bletchley.vert.intrinsity.com> From: fnf@intrinsity.com (Fred Fish) X-SW-Source: 2003-06/txt/msg00829.txt.bz2 > It's about par for the course :-( The code also assumes that > mips_r3041_reg_names, mips_r3051_reg_names and mips_r3081_reg_names are > the same size (90 - 32). If you're trying to add more than 90 > registers, you've a bigger problem. Currently we have at total of 416 registers defined, including the standard mips architecture registers. However that includes an individual register for every element of each matrix register, each of which holds 16 32-bit values. I'm working on redefining the register set more like how the MMX and Altivec registers work, where $m0 is a single register instead of 16 individual registers ($m0_00, ... $m0_15). > PS: Does Intrinsity have a disclaimer? Not yet, though AFAIK that doesn't prevent me from submitting simple bug fixes of only a few lines (particularly if they are relatively generic) and having them accepted, unless the policy has changed recently. I expect no problem with getting a disclaimer at some point in the near future to include all our changes. -Fred