/* Definitions to target GDB to or1k targets. Copyright 2001 Free Software Foundation, Inc. Contributed by Marko Mlinar, markom@opencores.org This file is part of GDB. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #ifndef TM_OR1K_H #define TM_OR1K_H #define GDB_MULTI_ARCH 1 #ifndef TARGET_OR1K #define TARGET_OR1K #endif #include "defs.h" #include /* CZ */ struct value; struct struct_or1k_implementation { /* Implementation version. */ unsigned int VR; /* Units present. */ unsigned int UPR; /* Number of total available matchpoints in this implementation. */ unsigned int num_matchpoints; /* Number of currently used matchpoints. */ unsigned int num_used_matchpoints; /* Has watchpoint driven counters. */ int has_counters; /* Number of registers. */ unsigned int num_gpr_regs; unsigned int num_vfpr_regs; /* Is there any vf support? */ int vf_present; }; struct or1k_target_ops { /* Name this target type. */ char *to_shortname; /* Init target. */ void (*to_init) PARAMS ((const char *args)); /* Destruct target. */ void (*to_done) PARAMS ((void)); /* Read register. Does not fail, places error no. in err instead or call error(), if fatal. */ ULONGEST (*to_read_reg) PARAMS ((unsigned int regno)); /* Write register. Does not fail, places error no. in err instead or call error(), if fatal. */ void (*to_write_reg) PARAMS ((unsigned int regno, ULONGEST value)); /* Read a block...possibly more efficient than several isolated call to read_reg...worst case the same efficiency. Returns 0 on success or errno if a failure occurred. */ int (*to_read_block) PARAMS ((unsigned int regno, void* block, int nregs)); /* Write a block...possibly more efficient than several isolated call to write_reg...worst case the same efficiency. Returns 0 on success or errno if a failure occurred. */ int (*to_write_block) PARAMS ((unsigned int regno, void* block, int nregs)); /* Selects scan chain. All register accesses are related to current scan chain. Does not fail, places error no. in err instead or call error(), if fatal. See jtag_chains enum. */ void (*to_set_chain) PARAMS ((int chain)); /* Executes extended command on the target. */ void (*to_exec_command) PARAMS ((const char *args, int from_tty)); /* Associated target_ops. */ struct target_ops *gdb_ops; /* Should be OPS_MAGIC. */ int to_magic; }; /* Context stuff. */ #define CURRENT_CID (0) #define MAX_CID (15) /* Instruction definitions. */ #define BRK_INSTR_STRUCT {0x21, 0x00, 0x00, 0x01} #define BRK_INSTR (0x21000001) #define NOP_INSTR (0x15000000) /* Special purpose regisers. */ #define SPR_GROUP_SIZE_BITS (11) #define SPR_GROUP_SIZE (1 << SPR_GROUP_SIZE_BITS) #define SPR_SYSTEM_GROUP (0) #define SPR_DEBUG_GROUP (6) #define SPR_GPR_START (1024) #define SPR_VFPR_START ((MAX_CID + 1) * MAX_GPR_REGS + SPR_GPR_START) #define OR1K_NUM_SPR_GROUPS (12) /* Define register values. */ #define SPR_REG(group, index) (((group) << SPR_GROUP_SIZE_BITS) + (index)) #define VR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 0) #define UPR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 1) #define CPUCFGR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 2) #define DCFGR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 7) #define PC_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 16) #define SR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 17) #define PPC_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 18) #define CCR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP, 4 + (cid)) #define EPCR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP, 32 + (cid)) #define EPCR0_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 32) #define DVR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 0xee) #define DCR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 0xee) #define DMR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 16) #define DMR2_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 17) #define DCWR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 0xee) #define DCWR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 0xee) #define DSR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 20) #define DRR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 21) #define ZERO_REGNUM (0) #define SP_REGNUM (1) #define FP_REGNUM (2) #define A0_REGNUM (3) #define A5_REGNUM (8) #define LR_REGNUM (9) #define RV_REGNUM (11) #define VFA0_REGNUM (MAX_GPR_REGS + 0) #define VFA5_REGNUM (MAX_GPR_REGS + 5) #define VFRV_REGNUM (MAX_GPR_REGS + 6) #define PC_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 0) #define PS_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 1) #define EPCR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 2) #define CCR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 2) /******** END OF ADDITIONS BY CZ ************/ extern int or1k_regnum_to_sprnum PARAMS ((int regno)); #define REGNUM_TO_SPRNUM(regno) (or1k_regnum_to_sprnum(regno)) /* Defines for SPR bits. */ #define DMR1_ST (0x00400000) /* Changed by CZ 21/06/01 */ #define DRR_TE (0x00002000) #define DRR_SSE (0x00001000) #define DRR_SCE (0x00000800) #define DRR_RE (0x00000400) #define DRR_IME (0x00000200) #define DRR_DME (0x00000100) #define DRR_HPINTE (0x00000080) #define DRR_IIE (0x00000040) #define DRR_AE (0x00000020) #define DRR_LPINTE (0x00000010) #define DRR_IPFE (0x00000008) #define DRR_DPFE (0x00000004) #define DRR_BUSEE (0x00000002) #define DRR_RSTE (0x00000001) /* Number of matchpoints */ #define NUM_MATCHPOINTS (or1k_implementation.num_matchpoints) #define MAX_MATCHPOINTS (8) /* Number of machine GPR registers */ #define NUM_GPR_REGS (or1k_implementation.num_gpr_regs) #define MAX_GPR_REGS (32) /* Number of machine VF registers */ #define NUM_VF_REGS (or1k_implementation.num_vfpr_regs) #define MAX_VF_REGS (32) #define OR1K_NUM_REGS (MAX_GPR_REGS + MAX_VF_REGS + 3) /* Size of stack entry - in bytes. */ #define OR1K_STACK_ALIGN (OR1K_64BIT_IMPLEMENTATION ? (8) : (4)) /* Can act like a little or big endian. */ #if !defined (TARGET_BYTE_ORDER_DEFAULT) #define TARGET_BYTE_ORDER_DEFAULT BIG_ENDIAN #define TARGET_BYTE_ORDER_SELECTABLE_P (1) #endif /* Size (in bytes) of registers. */ #define OR1K_SPR_REGSIZE (4) #define OR1K_VF_REGSIZE (8) #define OR1K_GPR_REGSIZE ((OR1K_64BIT_IMPLEMENTATION) ? (8) : (4)) #define OR1K_VF_DOUBLE (0) #define OR1K_IS_GPR(N) ((N) >= 0 && (N) < MAX_GPR_REGS) #define OR1K_IS_VF(N) ((N) >= MAX_GPR_REGS && (N) < MAX_GPR_REGS + MAX_VF_REGS) /* Is this implementation 64 or 32 bit. WARNING: gdb or1k port is not yet prepared for 64b implementations! */ #define OR1K_64BIT_IMPLEMENTATION 0 /* ABI uses R3 through R8 for args. */ #define OR1K_LAST_ARG_REGNUM (A5_REGNUM) #define OR1K_NUM_ARG_REGS (6) /* ABI uses VFR0 through VFR5 for float args. */ #define OR1K_LAST_FP_ARG_REGNUM (VFA5_REGNUM) #define OR1K_NUM_FP_ARG_REGS (6) /* Don't step over l.trap */ #define CANNOT_STEP_BREAKPOINT extern int or1k_insert_breakpoint (CORE_ADDR addr, char *contents_cache); #define target_insert_hw_breakpoint(addr, cache) or1k_insert_breakpoint (addr, cache) extern int or1k_remove_breakpoint (CORE_ADDR addr, char *contents_cache); #define target_remove_hw_breakpoint(addr, cache) or1k_remove_breakpoint (addr, cache) /* Watchpoint support. */ #define TARGET_HAS_HARDWARE_WATCHPOINTS /* Use these macros for watchpoint insertion/deletion. */ /* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */ extern int or1k_insert_watchpoint PARAMS ((CORE_ADDR addr, int len, int type)); #define target_insert_watchpoint(addr, len, type) \ or1k_insert_watchpoint (addr, len, type) extern int or1k_remove_watchpoint PARAMS ((CORE_ADDR addr, int len, int type)); #define target_remove_watchpoint(addr, len, type) \ or1k_remove_watchpoint (addr, len, type) /* We need to remove watchpoints when stepping, else we hit them again! */ #define HAVE_NONSTEPPABLE_WATCHPOINT extern int or1k_stopped_by_watchpoint PARAMS ((void)); #define STOPPED_BY_WATCHPOINT(w) or1k_stopped_by_watchpoint () extern int or1k_can_use_hardware_watchpoint PARAMS ((int bptype, int)); #define TARGET_CAN_USE_HARDWARE_WATCHPOINT(bp_type, cnt, ot) \ or1k_can_use_hardware_watchpoint(bp_type, cnt) /* Catchpoint support. */ /* HACK: how do we hook to signal namings otherwise? */ #include "target.h" extern char *target_signal_to_string PARAMS ((enum target_signal)); /* Return the name (SIGHUP, etc.) for a signal. */ extern const char *or1k_signal_to_name PARAMS ((enum target_signal)); /* Given a name (SIGHUP, etc.), return its signal. */ extern enum target_signal or1k_signal_from_name PARAMS ((const char *)); #define NUM_OR1K_SIGNALS (14) /* Is floating/vector unit present. */ #define OR1K_VF_PRESENT (or1k_implementation.vf_present) /* Maximum struct size, that is still stored onto stack. */ #define OR1K_STRUCT_CONV_SIZE (8) /* Stack must be aligned on 32-bit boundaries when synthesizing function calls. PUSH_ARGUMENTS will handle it. */ /* Return nonzero if instruction has delay slot */ extern int is_delayed PARAMS ((unsigned long)); /* Return non-zero if PC points to an instruction which will cause a step to execute both the instruction at PC and an instruction at PC+4. */ extern int or1k_step_skips_delay PARAMS ((CORE_ADDR)); #define STEP_SKIPS_DELAY_P (1) #define STEP_SKIPS_DELAY(pc) (or1k_step_skips_delay (pc)) /* Definitions and declarations used by or1k dependent files. */ #define OR1K_INSTLEN 4 /* Length of an instruction */ /* Defined in remote-or1k.c */ /* Target state names. */ extern const char *status_name[]; /* Target state. */ enum target_status { TARGET_UNDEFINED, TARGET_CONNECTING, TARGET_DISCONNECTING, TARGET_RUNNING, TARGET_STOPPED }; /* Compare conditions for DCRx registers. */ enum enum_compare_condition { CC_MASKED, CC_EQUAL, CC_LESS, CC_LESSE, CC_GREAT, CC_GREATE, CC_NEQUAL }; /* Compare operand to compare DVRx to. */ enum enum_compare_to { CT_DISABLED, CT_FETCH, CT_LEA, CT_SEA, CT_LDATA, CT_SDATA, CT_AEA, CT_ADATA }; /* Matchpoint chaining types. */ enum enum_chaining { CHAINING_NONE, CHAINING_AND, CHAINING_OR }; /* Names for cts. */ #define NUM_CT_NAMES 8 extern const char *compare_to_names[NUM_CT_NAMES]; /* DRCx struct */ struct dcr_struct { enum enum_compare_to ct:3; unsigned int sc:1; enum enum_compare_condition cc:3; unsigned int dp:1; }; /* All data needed for a matchpoint. */ struct matchpoint { struct dcr_struct dcr; unsigned int dvr; unsigned int chain_type; unsigned int cause_breakpoint; }; /* Trace related structures and data. */ #define TRACE_FILENAME_SIZE (128) extern char trace_filename[TRACE_FILENAME_SIZE]; #define TRACE_FILENAME (&trace_filename[0]) #define TRACE_DATA_SIZE (sizeof(struct htrace_data_struct)) struct htrace_data_struct { unsigned int unused:24; unsigned int data:32; unsigned int type:4; unsigned int reserved:3; unsigned int valid:1; }; enum enum_operation { TRIGOP_ANY, TRIGOP_OR, TRIGOP_AND }; struct htrace_event_struct { enum enum_operation operation:2; unsigned int reserved1:6; unsigned int is_valid:1; unsigned int is_trig:2; unsigned int ls_valid:1; unsigned int ls_trig:4; unsigned int reserved2:2; unsigned int bp_valid:1; unsigned int bp_trig:1; unsigned int wp_valid:1; unsigned int wp_trig:11; }; struct htrace_record_struct { unsigned int reserved:25; unsigned int rec:7; }; struct htrace_moder_struct { unsigned int reserved:29; unsigned int rec_sel_dep:1; unsigned int trace_enable:1; unsigned int contin:1; }; /* Number of records as defined in TAP. */ #define NUM_RECORDS (8) struct htrace_struct { /* Local copy of HW regs for trace. */ struct htrace_event_struct trig, qual, stop; struct htrace_record_struct recwp[MAX_MATCHPOINTS], recbp; struct htrace_moder_struct moder; /* Which matchpoints does record use? Bitmask. */ unsigned int wp_record_uses[MAX_MATCHPOINTS]; }; extern struct htrace_struct or1k_htrace; extern int trace_size; #define MAX_RECORD_NAMES 7 extern const char *or1k_record_names[MAX_RECORD_NAMES]; #define MAX_IS_NAMES 4 extern const char *or1k_is_names[MAX_IS_NAMES]; #define MAX_LS_NAMES 16 extern const char *or1k_ls_names[MAX_LS_NAMES]; /* Stuff for HW watches. */ #define MAX_HW_WATCHES MAX_MATCHPOINTS struct hwatch_struct { int matchpoint_start; }; extern int num_hw_watches; extern struct hwatch_struct or1k_hwatch[MAX_HW_WATCHES]; /* Possible errors are listed here. */ enum enum_errors /* modified CZ 24/05/01 */ { /* Codes > 0 are for system errors */ ERR_NONE = 0, ERR_CRC = -1, ERR_MEM = -2, JTAG_PROXY_INVALID_COMMAND = -3, JTAG_PROXY_SERVER_TERMINATED = -4, JTAG_PROXY_NO_CONNECTION = -5, JTAG_PROXY_PROTOCOL_ERROR = -6, JTAG_PROXY_COMMAND_NOT_IMPLEMENTED = -7, JTAG_PROXY_INVALID_CHAIN = -8, JTAG_PROXY_INVALID_ADDRESS = -9, JTAG_PROXY_ACCESS_EXCEPTION = -10, /* Write to ROM */ JTAG_PROXY_INVALID_LENGTH = -11, JTAG_PROXY_OUT_OF_MEMORY = -12, }; /* All JTAG chains. */ enum jtag_chains { SC_GLOBAL, /* 0 Global BS Chain */ SC_RISC_DEBUG, /* 1 RISC Debug Interface chain */ SC_RISC_TEST, /* 2 RISC Test Chain */ SC_TRACE, /* 3 Trace Chain */ SC_REGISTER, /* 4 Register Chain */ SC_WISHBONE, /* 5 Wisbone Chain */ SC_BLOCK /* Block Chains */ }; /* See JTAG documentation about these. */ #define JI_SIZE (4) enum jtag_instr { JI_EXTEST, JI_SAMPLE_PRELOAD, JI_IDCODE, JI_CHAIN_SELECT, JI_INTEST, JI_CLAMP, JI_CLAMPZ, JI_HIGHZ, JI_DEBUG, JI_BYPASS = 0xF }; /* JTAG registers. */ #define JTAG_MODER (0x0) #define JTAG_TSEL (0x1) #define JTAG_QSEL (0x2) #define JTAG_SSEL (0x3) #define JTAG_RISCOP (0x4) #define JTAG_RECWP0 (0x10) #define JTAG_RECBP0 (0x1b) /* Current register values. */ extern unsigned int dmr1; extern unsigned int dmr2; extern unsigned int dsr; extern unsigned int drr; extern int matchpoint_user_count[MAX_MATCHPOINTS]; /* Current watchpoints. */ extern unsigned int dvr[MAX_MATCHPOINTS]; extern struct dcr_struct dcr[MAX_MATCHPOINTS]; extern int debug_regs_changed; /* Returns error name. */ extern const char *or1k_err_name PARAMS ((int e)); /* Last error number. */ extern int err; extern struct struct_or1k_implementation or1k_implementation; extern unsigned int or1k_fetch_instruction PARAMS ((CORE_ADDR addr)); extern void or1k_fetch_registers PARAMS ((int regno)); /* Sets register/memory regno to data. */ extern void or1k_write_spr_reg PARAMS ((unsigned int regno, unsigned int data)); /* Sets register/memory regno to data. */ extern unsigned int or1k_read_spr_reg PARAMS ((unsigned int regno)); /* Flushes or1k's pipeline. */ extern void or1k_flush_pipeline PARAMS ((void)); /* Sifts unused matchpoints to higher indexses. */ extern void sift_matchpoints (); /* Issues or1ksim command */ extern void or1k_or1ksim_cmd PARAMS((const char *args, int from_tty)); /* Fetch a word from the target board. All memory accesses to the remote board are word aligned. */ extern unsigned int or1k_fetch_word (CORE_ADDR addr); /* Adds a group of hwatch commands to gdb */ extern void add_htrace_commands (); typedef enum { JTAG_COMMAND_READ = 1, JTAG_COMMAND_WRITE = 2, JTAG_COMMAND_BLOCK_READ = 3, JTAG_COMMAND_BLOCK_WRITE = 4, JTAG_COMMAND_CHAIN = 5, } JTAG_proxy_protocol_commands; /* Each transmit structure must begin with an integer which specifies the type of command. Information after this is variable. Make sure to have all information aligned properly. If we stick with 32 bit integers, it should be portable onto every platform. These structures will be transmitted across the network in network byte order. */ typedef struct { uint32_t command; uint32_t length; uint32_t address; uint32_t data_H; uint32_t data_L; } jtag_proxy_write_message_t; typedef struct { uint32_t command; uint32_t length; uint32_t address; } jtag_proxy_read_message_t; typedef struct { uint32_t command; uint32_t length; uint32_t address; int32_t nregs; uint32_t data[1]; } jtag_proxy_block_write_message_t; typedef struct { uint32_t command; uint32_t length; uint32_t address; int32_t nregs; } jtag_proxy_block_read_message_t; typedef struct { uint32_t command; uint32_t length; uint32_t chain; } jtag_proxy_chain_message_t; /* The responses are messages specific, however convention states the first word should be an error code. Again, sticking with 32 bit integers should provide maximum portability. */ typedef struct { int32_t status; } jtag_proxy_write_response_t; typedef struct { int32_t status; uint32_t data_H; uint32_t data_L; } jtag_proxy_read_response_t; typedef struct { int32_t status; } jtag_proxy_block_write_response_t; typedef struct { int32_t status; int32_t nregs; uint32_t data[1]; /* uint32_t data[nregs - 1] still unread */ } jtag_proxy_block_read_response_t; typedef struct { int32_t status; } jtag_proxy_chain_response_t; #endif /* TM_OR1K_H */