RFA: Purge dead code from MIPS

Daniel Jacobowitz
2002-06-10T04:00:39Z

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A lot of code is left over from before MIPS flipped to GDB_MULTI_ARCH == 1.
It's all been dead since Jun 8, 2000, so I see no need to keep it; and it's
one more thing out of the tm files. Look good, Andrew?

--
Daniel Jacobowitz Carnegie Mellon University
MontaVista Software Debian GNU/Linux Developer

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2002-06-10 Daniel Jacobowitz <drow@mvista.com>

* mips-tdep.c (MIPS_FPU_TYPE, FP_REGISTER_DOUBLE, MIPS_EABI)
(MIPS_LAST_FP_ARG_REGNUM, MIPS_LAST_ARG_REGNUM)
(MIPS_DEFAULT_SAVED_REGSIZE, MIPS_REGS_HAVE_HOME_P)
(MIPS_DEFAULT_STACK_ARGSIZE, GDB_TARGET_IS_MIPS64)
(MIPS_DEFAULT_MASK_ADDRESS_P): Remove obsolete definitions. Define
unconditionally.
(set_mipsfpu_single_command, set_mipsfpu_double_command)
(set_mipsfpu_none_command): Remove if (GDB_MULTI_ARCH).
(_initialize_mips_tdep): Remove dead code.
* config/mips/tm-irix5.h (MIPS_LAST_ARG_REGNUM)
(MIPS_DEFAULT_STACK_ARGSIZE, MIPS_REGS_HAVE_HOME_P): Remove.
* config/mips/tm-irix6.h (MIPS_LAST_ARG_REGNUM)
(MIPS_DEFAULT_STACK_ARGSIZE, MIPS_REGS_HAVE_HOME_P): Remove.
* config/mips/tm-mips.h (MIPS_EABI, MIPS_LAST_ARG_REGNUM,
MIPS_LAST_FP_ARG_REGNUM): Remove.

Index: mips-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/mips-tdep.c,v
retrieving revision 1.75
diff -u -p -r1.75 mips-tdep.c
--- mips-tdep.c 9 Jun 2002 19:36:15 -0000 1.75
+++ mips-tdep.c 10 Jun 2002 03:49:28 -0000
@@ -106,12 +106,6 @@ enum mips_fpu_type
#endif
static int mips_fpu_type_auto = 1;
static enum mips_fpu_type mips_fpu_type = MIPS_DEFAULT_FPU_TYPE;
-#define MIPS_FPU_TYPE mips_fpu_type
-
-/* Do not use "TARGET_IS_MIPS64" to test the size of floating point registers */
-#ifndef FP_REGISTER_DOUBLE
-#define FP_REGISTER_DOUBLE (REGISTER_VIRTUAL_SIZE(FP0_REGNUM) == 8)
-#endif

static int mips_debug = 0;

@@ -137,35 +131,18 @@ struct gdbarch_tdep
enum gdb_osabi osabi;
};

-#if GDB_MULTI_ARCH
-#undef MIPS_EABI
#define MIPS_EABI (gdbarch_tdep (current_gdbarch)->mips_abi == MIPS_ABI_EABI32 \
|| gdbarch_tdep (current_gdbarch)->mips_abi == MIPS_ABI_EABI64)
-#endif

-#if GDB_MULTI_ARCH
-#undef MIPS_LAST_FP_ARG_REGNUM
#define MIPS_LAST_FP_ARG_REGNUM (gdbarch_tdep (current_gdbarch)->mips_last_fp_arg_regnum)
-#endif

-#if GDB_MULTI_ARCH
-#undef MIPS_LAST_ARG_REGNUM
#define MIPS_LAST_ARG_REGNUM (gdbarch_tdep (current_gdbarch)->mips_last_arg_regnum)
-#endif

-#if GDB_MULTI_ARCH
-#undef MIPS_FPU_TYPE
#define MIPS_FPU_TYPE (gdbarch_tdep (current_gdbarch)->mips_fpu_type)
-#endif

/* Return the currently configured (or set) saved register size. */

-#if GDB_MULTI_ARCH
-#undef MIPS_DEFAULT_SAVED_REGSIZE
#define MIPS_DEFAULT_SAVED_REGSIZE (gdbarch_tdep (current_gdbarch)->mips_default_saved_regsize)
-#elif !defined (MIPS_DEFAULT_SAVED_REGSIZE)
-#define MIPS_DEFAULT_SAVED_REGSIZE MIPS_REGSIZE
-#endif

static const char *mips_saved_regsize_string = size_auto;

@@ -212,31 +189,18 @@ mips2_fp_compat (void)
form double-precision values). Do not use "TARGET_IS_MIPS64" to
determine if the ABI is using double-precision registers. See also
MIPS_FPU_TYPE. */
-#if GDB_MULTI_ARCH
-#undef FP_REGISTER_DOUBLE
#define FP_REGISTER_DOUBLE (gdbarch_tdep (current_gdbarch)->mips_fp_register_double)
-#endif

/* Does the caller allocate a ``home'' for each register used in the
function call? The N32 ABI and MIPS_EABI do not, the others do. */

-#if GDB_MULTI_ARCH
-#undef MIPS_REGS_HAVE_HOME_P
#define MIPS_REGS_HAVE_HOME_P (gdbarch_tdep (current_gdbarch)->mips_regs_have_home_p)
-#elif !defined (MIPS_REGS_HAVE_HOME_P)
-#define MIPS_REGS_HAVE_HOME_P (!MIPS_EABI)
-#endif

/* The amount of space reserved on the stack for registers. This is
different to MIPS_SAVED_REGSIZE as it determines the alignment of
data allocated after the registers have run out. */

-#if GDB_MULTI_ARCH
-#undef MIPS_DEFAULT_STACK_ARGSIZE
#define MIPS_DEFAULT_STACK_ARGSIZE (gdbarch_tdep (current_gdbarch)->mips_default_stack_argsize)
-#elif !defined (MIPS_DEFAULT_STACK_ARGSIZE)
-#define MIPS_DEFAULT_STACK_ARGSIZE (MIPS_DEFAULT_SAVED_REGSIZE)
-#endif

#define MIPS_STACK_ARGSIZE (mips_stack_argsize ())

@@ -253,17 +217,9 @@ mips_stack_argsize (void)
return 4;
}

-#if GDB_MULTI_ARCH
-#undef GDB_TARGET_IS_MIPS64
#define GDB_TARGET_IS_MIPS64 (gdbarch_tdep (current_gdbarch)->gdb_target_is_mips64 + 0)
-#endif

-#if GDB_MULTI_ARCH
-#undef MIPS_DEFAULT_MASK_ADDRESS_P
#define MIPS_DEFAULT_MASK_ADDRESS_P (gdbarch_tdep (current_gdbarch)->default_mask_address_p)
-#elif !defined (MIPS_DEFAULT_MASK_ADDRESS_P)
-#define MIPS_DEFAULT_MASK_ADDRESS_P (0)
-#endif

#define VM_MIN_ADDRESS (CORE_ADDR)0x400000

@@ -3567,10 +3523,7 @@ set_mipsfpu_single_command (char *args,
{
mips_fpu_type = MIPS_FPU_SINGLE;
mips_fpu_type_auto = 0;
- if (GDB_MULTI_ARCH)
- {
- gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_SINGLE;
- }
+ gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_SINGLE;
}

static void
@@ -3578,10 +3531,7 @@ set_mipsfpu_double_command (char *args,
{
mips_fpu_type = MIPS_FPU_DOUBLE;
mips_fpu_type_auto = 0;
- if (GDB_MULTI_ARCH)
- {
- gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_DOUBLE;
- }
+ gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_DOUBLE;
}

static void
@@ -3589,10 +3539,7 @@ set_mipsfpu_none_command (char *args, in
{
mips_fpu_type = MIPS_FPU_NONE;
mips_fpu_type_auto = 0;
- if (GDB_MULTI_ARCH)
- {
- gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_NONE;
- }
+ gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_NONE;
}

static void
@@ -4969,21 +4916,6 @@ This option can be set to one of:\n\
add_cmd ("mipsfpu", class_support, show_mipsfpu_command,
"Show current use of MIPS floating-point coprocessor target.",
&showlist);
-
-#if !GDB_MULTI_ARCH
- c = add_set_cmd ("processor", class_support, var_string_noescape,
- (char *) &tmp_mips_processor_type,
- "Set the type of MIPS processor in use.\n\
-Set this to be able to access processor-type-specific registers.\n\
-",
- &setlist);
- set_cmd_cfunc (c, mips_set_processor_type_command);
- c = add_show_from_set (c, &showlist);
- set_cmd_cfunc (c, mips_show_processor_type_command);
-
- tmp_mips_processor_type = xstrdup (DEFAULT_MIPS_TYPE);
- mips_set_processor_type_command (xstrdup (DEFAULT_MIPS_TYPE), 0);
-#endif

/* We really would like to have both "0" and "unlimited" work, but
command.c doesn't deal with that. So make it a var_zinteger
Index: config/mips/tm-irix5.h
===================================================================
RCS file: /cvs/src/src/gdb/config/mips/tm-irix5.h,v
retrieving revision 1.6
diff -u -p -r1.6 tm-irix5.h
--- config/mips/tm-irix5.h 6 Mar 2001 08:21:32 -0000 1.6
+++ config/mips/tm-irix5.h 10 Jun 2002 03:49:30 -0000
@@ -48,18 +48,6 @@
: ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
: builtin_type_int)

-#undef MIPS_LAST_ARG_REGNUM
-#define MIPS_LAST_ARG_REGNUM 11 /* N32 uses R4 through R11 for args */
-
-/* MIPS_STACK_ARGSIZE -- how many bytes does a pushed function arg take
- up on the stack? For the n32 ABI, eight bytes are reserved for each
- register. Like MIPS_SAVED_REGSIZE but different. */
-#define MIPS_DEFAULT_STACK_ARGSIZE 8
-
-/* N32 does not reserve home space for registers used to carry
- parameters. */
-#define MIPS_REGS_HAVE_HOME_P 0
-
/* Force N32 ABI as the default. */
#define MIPS_DEFAULT_ABI MIPS_ABI_N32

Index: config/mips/tm-irix6.h
===================================================================
RCS file: /cvs/src/src/gdb/config/mips/tm-irix6.h,v
retrieving revision 1.1
diff -u -p -r1.1 tm-irix6.h
--- config/mips/tm-irix6.h 7 Jun 2001 15:57:57 -0000 1.1
+++ config/mips/tm-irix6.h 10 Jun 2002 03:49:30 -0000
@@ -95,18 +95,6 @@
: ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
: builtin_type_int)

-#undef MIPS_LAST_ARG_REGNUM
-#define MIPS_LAST_ARG_REGNUM 11 /* N32 uses R4 through R11 for args */
-
-/* MIPS_STACK_ARGSIZE -- how many bytes does a pushed function arg take
- up on the stack? For the n32 ABI, eight bytes are reserved for each
- register. Like MIPS_SAVED_REGSIZE but different. */
-#define MIPS_DEFAULT_STACK_ARGSIZE 8
-
-/* N32 does not reserve home space for registers used to carry
- parameters. */
-#define MIPS_REGS_HAVE_HOME_P 0
-
/* Force N32 ABI as the default. */
#define MIPS_DEFAULT_ABI MIPS_ABI_N32

Index: config/mips/tm-mips.h
===================================================================
RCS file: /cvs/src/src/gdb/config/mips/tm-mips.h,v
retrieving revision 1.25
diff -u -p -r1.25 tm-mips.h
--- config/mips/tm-mips.h 10 Feb 2002 07:17:17 -0000 1.25
+++ config/mips/tm-mips.h 10 Jun 2002 03:49:31 -0000
@@ -38,10 +38,6 @@ struct value;
#include "coff/sym.h" /* Needed for PDR below. */
#include "coff/symconst.h"

-#if !defined (MIPS_EABI)
-#define MIPS_EABI 0
-#endif
-
/* PC should be masked to remove possible MIPS16 flag */
#if !defined (GDB_TARGET_MASK_DISAS_PC)
#define GDB_TARGET_MASK_DISAS_PC(addr) UNMAKE_MIPS16_ADDR(addr)
@@ -130,11 +126,6 @@ extern char *mips_register_name (int reg
#define ZERO_REGNUM 0 /* read-only register, always 0 */
#define V0_REGNUM 2 /* Function integer return value */
#define A0_REGNUM 4 /* Loc of first arg during a subr call */
-#if MIPS_EABI
-#define MIPS_LAST_ARG_REGNUM 11 /* EABI uses R4 through R11 for args */
-#else
-#define MIPS_LAST_ARG_REGNUM 7 /* old ABI uses R4 through R7 for args */
-#endif
#define T9_REGNUM 25 /* Contains address of callee in PIC */
#define SP_REGNUM 29 /* Contains address of top of stack */
#define RA_REGNUM 31 /* Contains return address value */
@@ -146,11 +137,6 @@ extern char *mips_register_name (int reg
#define PC_REGNUM 37 /* Contains program counter */
#define FP0_REGNUM 38 /* Floating point register 0 (single float) */
#define FPA0_REGNUM (FP0_REGNUM+12) /* First float argument register */
-#if MIPS_EABI /* EABI uses F12 through F19 for args */
-#define MIPS_LAST_FP_ARG_REGNUM (FP0_REGNUM+19)
-#else /* old ABI uses F12 through F15 for args */
-#define MIPS_LAST_FP_ARG_REGNUM (FP0_REGNUM+15)
-#endif
#define FCRCS_REGNUM 70 /* FP control/status */
#define FCRIR_REGNUM 71 /* FP implementation/revision */
#define FP_REGNUM 72 /* Pseudo register that contains true address of executing stack frame */