From: Daniel Jacobowitz <drow@mvista.com>
To: Richard.Earnshaw@arm.com
Cc: Michael Snyder <msnyder@redhat.com>,
Andrew Cagney <ac131313@cygnus.com>,
gdb-patches@sources.redhat.com
Subject: Re: [patch/rfc] Revise REGISTER_SIM_REGNO()
Date: Sat, 18 May 2002 12:39:00 -0000 [thread overview]
Message-ID: <20020518193900.GA17960@branoic.wv.cc.cmu.edu> (raw)
In-Reply-To: <200205181055.LAA26201@cam-mail2.cambridge.arm.com>
On Sat, May 18, 2002 at 11:55:01AM +0100, Richard Earnshaw wrote:
>
> > > I need a way the target vector to let REGISTER_NAME() know that the
> > > register is "unavailable this session", so that it can return an empty
> > > string for the register; so that gdb won't think it exists at all.
> >
> >
> > I see. This is something that depends on both the arch and the target.
>
> Yep, the arch says what registers a processor has, the target says which
> of those it can supply.
>
> Of course, you will only get a useful debugging session if the two overlap
> sufficiently.
>
> I suspect that it will be quite common for the arch to describe registers
> that are only available when the processor is running in a privileged
> mode; clearly you don't need those to debug a user-level program, but they
> can be very helpful when trying to debug an OS. Certainly this is the way
> I'd like to describe the views of ARM processors.
SH is the same. The GNU/Linux native patch that the community is using
(which I keep meaning to fix up and submit...) patches a lot of
register names to "".
--
Daniel Jacobowitz Carnegie Mellon University
MontaVista Software Debian GNU/Linux Developer
next prev parent reply other threads:[~2002-05-18 19:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-05-14 15:48 Andrew Cagney
2002-05-15 3:46 ` Richard Earnshaw
2002-05-16 16:35 ` Michael Snyder
2002-05-17 2:07 ` Richard Earnshaw
2002-05-17 10:49 ` Michael Snyder
2002-05-18 3:55 ` Richard Earnshaw
2002-05-18 12:39 ` Daniel Jacobowitz [this message]
2002-05-19 21:35 ` Andrew Cagney
2002-05-28 19:19 ` Andrew Cagney
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