From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12461 invoked by alias); 18 May 2002 11:41:13 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 12442 invoked from network); 18 May 2002 11:41:09 -0000 Received: from unknown (HELO freya.cs.umass.edu) (128.119.240.41) by sources.redhat.com with SMTP; 18 May 2002 11:41:09 -0000 Received: from localhost (h00104b9a9fce.ne.client2.attbi.com [24.60.185.88]) by freya.cs.umass.edu (8.8.8/8.8.8) with ESMTP id HAA17479 for ; Sat, 18 May 2002 07:41:08 -0400 (EDT) Date: Sat, 18 May 2002 04:41:00 -0000 Message-Id: <20020518.074029.25910897.kazu@cs.umass.edu> To: gdb-patches@sources.redhat.com Subject: [patch] sim/h8300/compile.c: Fix formatting. From: Kazu Hirata Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-SW-Source: 2002-05/txt/msg00783.txt.bz2 Hi, Attached is a patch to fix formatting. Committed as obvious. Kazu Hirata 2002-05-18 Kazu Hirata * compile.c: Fix formatting. Index: compile.c =================================================================== RCS file: /cvs/src/src/sim/h8300/compile.c,v retrieving revision 1.13 diff -u -r1.13 compile.c --- compile.c 17 May 2002 19:22:14 -0000 1.13 +++ compile.c 18 May 2002 11:30:21 -0000 @@ -1044,10 +1044,10 @@ #endif if (code->opcode) - { - cycles += code->cycles; - insts++; - } + { + cycles += code->cycles; + insts++; + } switch (code->opcode) { @@ -1139,35 +1139,35 @@ case O (O_EEPMOV, SB): case O (O_EEPMOV, SW): - if(h8300hmode||h8300smode) - { - register unsigned char *_src,*_dst; - unsigned int count = (code->opcode==O(O_EEPMOV, SW))?cpu.regs[R4_REGNUM]&0xffff: - cpu.regs[R4_REGNUM]&0xff; - - _src = cpu.regs[R5_REGNUM] < memory_size ? cpu.memory+cpu.regs[R5_REGNUM] : - cpu.eightbit + (cpu.regs[R5_REGNUM] & 0xff); - if((_src+count)>=(cpu.memory+memory_size)) - { - if((_src+count)>=(cpu.eightbit+0x100)) - goto illegal; - } - _dst = cpu.regs[R6_REGNUM] < memory_size ? cpu.memory+cpu.regs[R6_REGNUM] : + if(h8300hmode||h8300smode) + { + register unsigned char *_src,*_dst; + unsigned int count = (code->opcode==O(O_EEPMOV, SW))?cpu.regs[R4_REGNUM]&0xffff: + cpu.regs[R4_REGNUM]&0xff; + + _src = cpu.regs[R5_REGNUM] < memory_size ? cpu.memory+cpu.regs[R5_REGNUM] : + cpu.eightbit + (cpu.regs[R5_REGNUM] & 0xff); + if((_src+count)>=(cpu.memory+memory_size)) + { + if((_src+count)>=(cpu.eightbit+0x100)) + goto illegal; + } + _dst = cpu.regs[R6_REGNUM] < memory_size ? cpu.memory+cpu.regs[R6_REGNUM] : cpu.eightbit + (cpu.regs[R6_REGNUM] & 0xff); - if((_dst+count)>=(cpu.memory+memory_size)) - { - if((_dst+count)>=(cpu.eightbit+0x100)) - goto illegal; - } - memcpy(_dst,_src,count); - - cpu.regs[R5_REGNUM]+=count; - cpu.regs[R6_REGNUM]+=count; - cpu.regs[R4_REGNUM]&=(code->opcode==O(O_EEPMOV, SW))?(~0xffff):(~0xff); - cycles += 2*count; - goto next; - } - goto illegal; + if((_dst+count)>=(cpu.memory+memory_size)) + { + if((_dst+count)>=(cpu.eightbit+0x100)) + goto illegal; + } + memcpy(_dst,_src,count); + + cpu.regs[R5_REGNUM]+=count; + cpu.regs[R6_REGNUM]+=count; + cpu.regs[R4_REGNUM]&=(code->opcode==O(O_EEPMOV, SW))?(~0xffff):(~0xff); + cycles += 2*count; + goto next; + } + goto illegal; case O (O_ADDS, SL): SET_L_REG (code->dst.reg, @@ -1256,59 +1256,59 @@ goto setc; case O (O_STC, SB): case O (O_STC, SW): - if(code->src.type==OP_CCR) - { - GET_CCR(res); - } - else if(code->src.type==OP_EXR && h8300smode) - { - GET_EXR(res); - } - else + if(code->src.type==OP_CCR) + { + GET_CCR(res); + } + else if(code->src.type==OP_EXR && h8300smode) + { + GET_EXR(res); + } + else goto illegal; store (&code->dst, res); goto next; case O (O_ANDC, SB): - if(code->dst.type==OP_CCR) - { - GET_CCR (rd); - } - else if(code->dst.type==OP_EXR && h8300smode) - { - GET_EXR (rd); - } - else + if(code->dst.type==OP_CCR) + { + GET_CCR (rd); + } + else if(code->dst.type==OP_EXR && h8300smode) + { + GET_EXR (rd); + } + else goto illegal; ea = code->src.literal; res = rd & ea; goto setc; case O (O_ORC, SB): - if(code->dst.type==OP_CCR) - { - GET_CCR (rd); - } - else if(code->dst.type==OP_EXR && h8300smode) - { - GET_EXR (rd); - } - else + if(code->dst.type==OP_CCR) + { + GET_CCR (rd); + } + else if(code->dst.type==OP_EXR && h8300smode) + { + GET_EXR (rd); + } + else goto illegal; ea = code->src.literal; res = rd | ea; goto setc; case O (O_XORC, SB): - if(code->dst.type==OP_CCR) - { - GET_CCR (rd); - } - else if(code->dst.type==OP_EXR && h8300smode) - { - GET_EXR (rd); - } - else + if(code->dst.type==OP_CCR) + { + GET_CCR (rd); + } + else if(code->dst.type==OP_EXR && h8300smode) + { + GET_EXR (rd); + } + else goto illegal; ea = code->src.literal; res = rd ^ ea; @@ -1489,7 +1489,7 @@ the macros here instead of looking for .../sys/wait.h. */ #define SIM_WIFEXITED(v) (((v) & 0xff) == 0) #define SIM_WIFSIGNALED(v) (((v) & 0x7f) > 0 && (((v) & 0x7f) < 0x7f)) - if (! SIM_WIFEXITED (cpu.regs[0]) && SIM_WIFSIGNALED (cpu.regs[0])) + if (! SIM_WIFEXITED (cpu.regs[0]) && SIM_WIFSIGNALED (cpu.regs[0])) cpu.exception = SIGILL; else cpu.exception = SIGTRAP; @@ -1502,7 +1502,7 @@ OBITOP (O_BNOT, 1, 1, ea ^= m); OBITOP (O_BTST, 1, 0, nz = ea & m); OBITOP (O_BCLR, 1, 1, ea &= ~m); - OBITOP (O_BSET, 1, 1, ea |= m); + OBITOP (O_BSET, 1, 1, ea |= m); OBITOP (O_BLD, 1, 0, c = ea & m); OBITOP (O_BILD, 1, 0, c = !(ea & m)); OBITOP (O_BST, 1, 1, ea &= ~m; @@ -1534,20 +1534,20 @@ break; case O (O_TAS, SB): - if( !h8300smode || code->src.type != X (OP_REG, SL) ) - goto illegal; - switch(code->src.reg) - { - case R0_REGNUM: - case R1_REGNUM: - case R4_REGNUM: - case R5_REGNUM: - break; - default: - goto illegal; - } - res = fetch (&code->src); - store (&code->src,res|0x80); + if( !h8300smode || code->src.type != X (OP_REG, SL) ) + goto illegal; + switch(code->src.reg) + { + case R0_REGNUM: + case R1_REGNUM: + case R4_REGNUM: + case R5_REGNUM: + break; + default: + goto illegal; + } + res = fetch (&code->src); + store (&code->src,res|0x80); goto just_flags_log8; case O (O_DIVU, SB): @@ -1682,17 +1682,17 @@ setc: if(code->dst.type==OP_CCR) - { - cpu.ccr = res; - GETSR (); - } + { + cpu.ccr = res; + GETSR (); + } else if(code->dst.type==OP_EXR && h8300smode) - { - cpu.exr = res; - GETEXR (); - } + { + cpu.exr = res; + GETEXR (); + } else - goto illegal; + goto illegal; goto next; @@ -1995,7 +1995,7 @@ init_pointers (); if(!h8300smode && rn >=EXR_REGNUM) - rn++; + rn++; switch (rn) { default: