From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 16337 invoked by alias); 7 May 2002 10:21:12 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 16314 invoked from network); 7 May 2002 10:21:08 -0000 Received: from unknown (HELO fw-cam.cambridge.arm.com) (193.131.176.3) by sources.redhat.com with SMTP; 7 May 2002 10:21:08 -0000 Received: by fw-cam.cambridge.arm.com; id LAA28639; Tue, 7 May 2002 11:21:06 +0100 (BST) Received: from unknown(172.16.1.2) by fw-cam.cambridge.arm.com via smap (V5.5) id xma028349; Tue, 7 May 02 11:20:53 +0100 Received: from cam-mail2.cambridge.arm.com (cam-mail2.cambridge.arm.com [172.16.1.91]) by cam-admin0.cambridge.arm.com (8.9.3/8.9.3) with ESMTP id LAA00400; Tue, 7 May 2002 11:20:52 +0100 (BST) Received: from sun18.cambridge.arm.com (sun18.cambridge.arm.com [172.16.2.18]) by cam-mail2.cambridge.arm.com (8.9.3/8.9.3) with ESMTP id LAA02712; Tue, 7 May 2002 11:20:51 +0100 (BST) Message-Id: <200205071020.LAA02712@cam-mail2.cambridge.arm.com> To: Andrew Cagney cc: gdb-patches@sources.redhat.com, Richard.Earnshaw@arm.com Reply-To: Richard.Earnshaw@arm.com Organization: ARM Ltd. X-Telephone: +44 1223 400569 (direct+voicemail), +44 1223 400400 (switchbd) X-Fax: +44 1223 400410 X-Address: ARM Ltd., 110 Fulbourn Road, Cherry Hinton, Cambridge CB1 9NJ. X-Url: http://www.arm.com/ Subject: Re: [patch/rfc] default REGISTER_VIRTUAL_SIZE and REGISTER_RAW_SIZE to register_size In-reply-to: Your message of "Sun, 05 May 2002 22:28:05 EDT." <3CD5EA35.9020104@cygnus.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Tue, 07 May 2002 03:21:00 -0000 From: Richard Earnshaw X-SW-Source: 2002-05/txt/msg00145.txt.bz2 > Hello, > > For most architectures. The relationship: > > REGISTER_VIRTUAL_SIZE(N) > == REGISTER_RAW_SIZE(N) > == TYPE_LENGTH(REGISTER_VIRTUAL_TYPE(N) > > (the exception is the @$(*&@(^$*&^!@ MIPS ...). Given this, the > attached patch changes the architecture vector so that it defaults both > to the register's type size. The ARM has REGISTER_VIRTUAL_SIZE(FPA-reg) == 8, but REGISTER_RAW_SIZE(FPA-reg) == 12. But that doesn't necessarily make the change wrong, provided we can override the default. R.