[PATCH] Fix sparc-*-linux register fetching/storing

Jakub Jelinek
2001-11-23T14:39:44Z

Hi!

On sparc-*-linux, bfd automatically supports both 32bit and 64bit ABI and
thus CORE_ADDR is 64bit type. Unfortunately, this means %l0-%i7 registers
are read from incorrect place (and stored too), particularly from caller's
instruction chain. This means even simple commands like next or bt don't
work at all.
Ok to commit?

2001-11-23 Jakub Jelinek <jakub@redhat.com>

* sparc-nat.c (fetch_inferior_registers): Don't rely
on CORE_ADDR being 32-bit.
(store_inferior_registers): Likewise.

--- gdb/sparc-nat.c.jj Sun Oct 14 19:15:14 2001
+++ gdb/sparc-nat.c Fri Nov 23 16:45:58 2001
@@ -120,15 +120,15 @@ fetch_inferior_registers (int regno)
all (16 ptrace calls!) if we really need them. */
if (regno == -1)
{
- target_read_memory (*(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)],
- &registers[REGISTER_BYTE (L0_REGNUM)],
+ CORE_ADDR sp = *(unsigned int *) & registers[REGISTER_BYTE (SP_REGNUM)];
+ target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)],
16 * REGISTER_RAW_SIZE (L0_REGNUM));
for (i = L0_REGNUM; i <= I7_REGNUM; i++)
register_valid[i] = 1;
}
else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
{
- CORE_ADDR sp = *(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)];
+ CORE_ADDR sp = *(unsigned int *) & registers[REGISTER_BYTE (SP_REGNUM)];
i = REGISTER_BYTE (regno);
if (register_valid[regno])
printf_unfiltered ("register %d valid and read\n", regno);
@@ -190,7 +190,7 @@ store_inferior_registers (int regno)

if (wanna_store & STACK_REGS)
{
- CORE_ADDR sp = *(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)];
+ CORE_ADDR sp = *(unsigned int *) & registers[REGISTER_BYTE (SP_REGNUM)];

if (regno < 0 || regno == SP_REGNUM)
{

Jakub