From mboxrd@z Thu Jan 1 00:00:00 1970 From: David B Anderson To: David B Anderson , Andrew Cagney Cc: gdb-patches@sources.redhat.com, drow@mvista.com Subject: Re: [rfa] mips argument passing fixes for o32 Date: Tue, 17 Jul 2001 07:49:00 -0000 Message-id: <200107171447.HAA66261@quasar.engr.sgi.com> References: <200107130003.RAA57770@quasar.engr.sgi.com> <200107160328.UAA42806@quasar.engr.sgi.com> X-SW-Source: 2001-07/msg00420.html > >The debate os over a possible exception to this rule. Given a very >small structure and the code segment: > > struct c1 { char c; } s1; > foo (struct c1); > ... > foo (s1); > >GCC is always left shifting s1 in a register (regardless of -EL or EB). Well.... proton 25% cc -c -32 t3.c -show /usr/lib/cc -DEFAULT:abi=n32:isa=mips4:proc=r10k -c -32 t3.c -show /usr/lib/cfe -D_MIPS_FPSET=16 -D_MIPS_ISA=2 -D_ABIO32=1 -D_MIPS_SIM=_ABIO32 -D_MIPS_SZINT=32 -D_MIPS_SZLONG=32 -D_MIPS_SZPTR=32 -D_SIZE_INT=32 -D_SIZE_LONG=32 -D_SIZE_PTR=32 -D__EXTENSIONS__ -DLANGUAGE_C -D_LANGUAGE_C -D__INLINE_INTRINSICS -Dsgi -D__sgi -Dunix -Dmips -Dhost_mips -D__unix -D__host_mips -D_SVR4_SOURCE -D_MODERN_C -D_SGI_SOURCE -D_PIC -D__DSO__ -DSYSTYPE_SVR4 -D_SYSTYPE_SVR4 -D_LONGLONG -D__mips=2 -I -D_MIPSEB -DMIPSEB -D__STDC__=1 -I/usr/include t3.c -Xv -D_CFE -Amachine(mips) -Asystem(unix) -call_shared -G 0 -std -XS/tmp/ctmsta000Ss -mips2 -EB -Xg0 -O1 > /tmp/ctmfa000Ss cfe: main /usr/lib/ugen -v -G 0 -pic2 -mips2 -EB -g0 -O1 /tmp/ctmfa000Ss -o /tmp/ctmca000Ss -t /tmp/ctmsta000Ss -temp /tmp/ctmgta000Ss ugen: main /usr/lib/as1 -t5_ll_sc_bug -elf -pic2 -v -G 0 -p0 -mips2 -EB -g0 -O1 /tmp/ctmca000Ss -o t3.o -t /tmp/ctmsta000Ss as1: main proton 26% dis t3.o **** DISASSEMBLER **** disassembly for t3.o section .text main: [ 7] 0x 0: 3c 1c 00 00 lui gp,0 [ 7] 0x 4: 27 9c 00 00 addiu gp,gp,0 [ 7] 0x 8: 03 99 e0 21 addu gp,gp,t9 [ 8] 0x c: 8f 8e 00 00 lw t2,0(gp) [ 8] 0x 10: 8f 99 00 00 lw t9,0(gp) [ 7] 0x 14: 27 bd ff e0 addiu sp,sp,-32 [ 8] 0x 18: 91 ce 00 00 lbu t2,0(t2) [ 7] 0x 1c: af bf 00 1c sw ra,28(sp) [ 7] 0x 20: af bc 00 18 sw gp,24(sp) [ 8] 0x 24: a3 ae 00 00 sb t2,0(sp) [ 8] 0x 28: 03 20 f8 09 jalr t9 [ 8] 0x 2c: 8f a4 00 00 lw a0,0(sp) [ 9] 0x 30: 8f bf 00 1c lw ra,28(sp) [ 8] 0x 34: 8f bc 00 18 lw gp,24(sp) [ 9] 0x 38: 27 bd 00 20 addiu sp,sp,32 [ 9] 0x 3c: 03 e0 00 08 jr ra [ 9] 0x 40: 00 00 10 25 move v0,zero [ 9] 0x 44: 00 00 00 00 nop [ 9] 0x 48: 00 00 00 00 nop [ 9] 0x 4c: 00 00 00 00 nop proton 27% cat t3.c struct c1 { char c; } s1; int foo (struct c1); int main() { foo (s1); return 0; } And -EL seems to generate the same instructions (but I don't quite trust -EL). Regards, David B. Anderson davea@sgi.com danderson@acm.org < http://reality.sgi.com/davea > (reality.sgi.com to be permanently turned off -- around Aug 15, 2001)