From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Jacobowitz To: gdb-patches@sources.redhat.com Subject: [RFA] Add mips_software_single_step Date: Wed, 04 Jul 2001 11:56:00 -0000 Message-id: <20010704115630.A16310@nevyn.them.org> X-SW-Source: 2001-07/msg00053.html This function's pretty straightforward; the Linux port uses it. Ok to commit? I've been tempted to redo this more like the Sparc's version, in which we set breakpoints at all possible destinations rather than at the calculated next destination. But I think that with the previously posted patch, I trust mips_next_pc enough to leave it this way. -- Daniel Jacobowitz Carnegie Mellon University MontaVista Software Debian GNU/Linux Developer 2001-07-04 Daniel Jacobowitz * mips-tdep.c (mips_software_single_step): New function. Index: gdb/mips-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/mips-tdep.c,v retrieving revision 1.54 diff -u -r1.54 mips-tdep.c --- mips-tdep.c 2001/06/16 20:00:24 1.54 +++ mips-tdep.c 2001/07/04 18:15:03 @@ -1379,6 +1392,35 @@ return addr; } +/* mips_software_single_step() is called just before we want to resume + the inferior, if we want to single-step it but there is no hardware + or kernel single-step support (MIPS on Linux for example). We find + the target of the coming instruction and breakpoint it. + + single_step is also called just after the inferior stops. If we had + set up a simulated single-step, we undo our damage. */ + +void +mips_software_single_step (signal, insert_breakpoints_p) + unsigned int signal; + int insert_breakpoints_p; +{ + static CORE_ADDR next_pc; + typedef char binsn_quantum[BREAKPOINT_MAX]; + static binsn_quantum break_mem; + CORE_ADDR pc; + + if (insert_breakpoints_p) + { + pc = read_register (PC_REGNUM); + next_pc = mips_next_pc (pc); + + target_insert_breakpoint (next_pc, break_mem); + } + else + target_remove_breakpoint (next_pc, break_mem); +} + static void mips_init_frame_pc_first (int fromleaf, struct frame_info *prev) {