Re: [PATCH 00/24] Fix reading and writing pseudo registers in non-current frames

Simon Marchi
2023-11-09T03:05:29Z

On 2023-11-08 00:16, Simon Marchi wrote:
>
>
> On 2023-11-08 00:00, Simon Marchi wrote:
>> This series fixes reading/writing pseudo registers from/to non-current
>> frames (that is, frames other than frame 0). Currently, we get this:
>>
>> (gdb) frame 0
>> #0 break_here_asm () at /home/smarchi/src/binutils-gdb/gdb/testsuite/gdb.arch/amd64-pseudo-unwind-asm.S:38
>> 38 pop %rbx
>> (gdb) p/x $rbx
>> $1 = 0x2021222324252627
>> (gdb) p/x $ebx
>> $2 = 0x24252627
>> (gdb) frame 1
>> #1 0x000055555555517d in caller () at /home/smarchi/src/binutils-gdb/gdb/testsuite/gdb.arch/amd64-pseudo-unwind-asm.S:58
>> 58 call callee
>> (gdb) p/x $rbx
>> $3 = 0x1011121314151617
>> (gdb) p/x $ebx
>> $4 = 0x24252627
>>
>> This is a bit surprising, we would expect the last value to be
>> 0x14151617, the bottom half of the rbx value from frame 1 (the currently
>> selected frame at that point). Instead, we got the bottom half of the
>> rbx value from frame 0. This is because pseudo registers are always
>> read/written from/to the current thread's regcache.
>>
>> This series fixes this (as well as writing to pseudo registers) by
>> making it so pseudo registers are read/written using a frame.
>
> Ah, I forgot because it's been so long, but this can be considered a v3
> of this series here...
>
> https://inbox.sourceware.org/gdb-patches/20181024014333.14143-1-simon.marchi@polymtl.ca/
>
> Simon

A bit more information that I realized I left out: this series fixes the
behavior for AArch64, ARM and AMD64/i386, because those are the three
architectures I had tests already written for. It shouldn't be too hard
to update other architectures, the slightly more difficult part is to
write a test, since it involves writing assembly and CFI directives, not
something most people do everyday.

Simon