From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id TzwYAGHHeGGYAQAAWB0awg (envelope-from ) for ; Tue, 26 Oct 2021 23:28:33 -0400 Received: by simark.ca (Postfix, from userid 112) id E29F11F0BF; Tue, 26 Oct 2021 23:28:32 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-0.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,RDNS_DYNAMIC,UNPARSEABLE_RELAY, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 38A311F0BB for ; Tue, 26 Oct 2021 23:28:32 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A0F19385780E for ; Wed, 27 Oct 2021 03:28:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A0F19385780E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1635305311; bh=WCYQ8thhOtVr4V11D2im2u10gBTrL9J9122793vVgD0=; h=Subject:To:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=uL19LuaJgdUgh9JTUJ7hiZNdIRYW8qDGvCUD32gx6hSi2roz5x3ixInCe/LnwYfXw 8GcnqjH0LCcLfmb/oF5NsBJjIpqVHAAFy7LJvPgEtb2zO+aZmjXBUD6CvEsaqhIQhu G9FzSzztzjP5hCOvB49nKHVTlT+UVAdafeXkcHMU= Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by sourceware.org (Postfix) with ESMTPS id 63F333857C63 for ; Wed, 27 Oct 2021 03:28:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 63F333857C63 X-UUID: f06ad1f8120449a394c67f37e77118a4-20211027 X-UUID: f06ad1f8120449a394c67f37e77118a4-20211027 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1353676076; Wed, 27 Oct 2021 11:28:00 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Wed, 27 Oct 2021 11:27:59 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 27 Oct 2021 11:27:59 +0800 Message-ID: <1cf5b86b782785a4fa754475acd7377acd14bab4.camel@mediatek.com> Subject: Re: [PATCH] AArch64 pauth: Indicate addresses in backtrace for kernel To: Luis Machado , "gdb-patches@sourceware.org" Date: Wed, 27 Oct 2021 11:27:59 +0800 In-Reply-To: References: <20211025114705.32548-1-Kuan-Ying.Lee@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Kuan-Ying Lee via Gdb-patches Reply-To: Kuan-Ying Lee Cc: James Hsu =?UTF-8?Q?=28=E5=BE=90=E6=85=B6=E8=96=B0=29?= , Nicholas Tang =?UTF-8?Q?=28=E9=84=AD=E7=A7=A6=E8=BC=9D=29?= , Zhiyong Wang =?UTF-8?Q?=28=E7=8E=8B=E5=BF=97=E5=8B=87=29?= , Chinwen Chang =?UTF-8?Q?=28=E5=BC=B5=E9=8C=A6=E6=96=87=29?= Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org Sender: "Gdb-patches" On Tue, 2021-10-26 at 20:46 +0800, Luis Machado wrote: > Hi! > > Second time's the charm. > > On 10/25/21 8:47 AM, Kuan-Ying Lee via Gdb-patches wrote: > > Armv8.3-a Pointer Authentication cause the function return address > > to > > be changed. GDB need to use address bit[55] to know which mode is > > active > > and mask/unmask the link register in order to get backtrace. > > > > If address is in kernel mode, we mask the address. If address is in > > user mode, > > we need to unmask the address. > > --- > > gdb/aarch64-tdep.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c > > index 4b5af4616af..d4bb4305cea 100644 > > --- a/gdb/aarch64-tdep.c > > +++ b/gdb/aarch64-tdep.c > > @@ -257,7 +257,10 @@ aarch64_frame_unmask_lr (struct gdbarch_tdep > > *tdep, > > { > > int cmask_num = AARCH64_PAUTH_CMASK_REGNUM (tdep- > > >pauth_reg_base); > > CORE_ADDR cmask = frame_unwind_register_unsigned > > (this_frame, cmask_num); > > - addr = addr & ~cmask; > > + if (addr & 0x0080000000000000ULL) > > I think we should define this constant in aarch64-tdep.h to make it > more > obvious: > > #define AARCH64_PAC_VA_RANGE_BIT 55 > #define AARCH64_PAC_VA_RANGE_MASK (1ULL << AARCH64_PAC_VA_RANGE_BIT) > > > + addr = addr | cmask; > > + else > > + addr = addr & ~cmask; > > For the unmasking of the address, it would be nice to put this into > a > separate function that unmasks an address given a particular mask > value. > Something like this: > > static CORE_ADDR > aarch64_unmask_address (CORE_ADDR address, CORE_ADDR mask) > { > /* Unmask kernel mode and user mode addresses appropriately based > on > the VA range bit. */ > if (address & AARCH64_PAC_VA_RANGE_MASK) > address | mask; > else > address & ~mask; > > return address; > } > > If we ever need to unmask kernel/user addresses somewhere else in > the > code, we can just call this function from now on. Got it. > > Could you please send a v2 of the patch with the suggested changes? Sure. Thanks for the suggestions. > > Thanks for the patch.