From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5485 invoked by alias); 24 Jun 2007 06:32:55 -0000 Received: (qmail 5476 invoked by uid 22791); 24 Jun 2007 06:32:54 -0000 X-Spam-Check-By: sourceware.org Received: from viper.snap.net.nz (HELO viper.snap.net.nz) (202.37.101.8) by sourceware.org (qpsmtpd/0.31) with ESMTP; Sun, 24 Jun 2007 06:32:50 +0000 Received: from kahikatea.snap.net.nz (48.60.255.123.dynamic.snap.net.nz [123.255.60.48]) by viper.snap.net.nz (Postfix) with ESMTP id 7E50F3D9A88 for ; Sun, 24 Jun 2007 18:32:46 +1200 (NZST) Received: by kahikatea.snap.net.nz (Postfix, from userid 1000) id 814078FBF6; Sun, 24 Jun 2007 18:32:32 +1200 (NZST) From: Nick Roberts MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-ID: <18046.4095.409804.261082@kahikatea.snap.net.nz> Date: Sun, 24 Jun 2007 06:32:00 -0000 To: gdb-patches@sources.redhat.com Subject: [PATCH: doco] gdbint.texinfo X-Mailer: VM 7.19 under Emacs 22.1.50.4 X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2007-06/txt/msg00435.txt.bz2 I still get confused by target and architecture (sometimes, they seem to be used interchangeably) but how about adding a menu and creating nodes as below? Also `gdb/ARCH-tdep.c' `gdb/ARCH-tdep.h' This often exists to describe the basic layout of the target machine's processor chip (registers, stack, etc.). If used, it is included by `TTT-tdep.h'. It can be shared among many targets that use the same processor. `gdb/config/ARCH/tm-ARCH.h' This often exists to describe the basic layout of the target machine's processor chip (registers, stack, etc.). If used, it is included by `tm-TTT.h'. It can be shared among many targets that use the same processor. have the same description. I presume the first is wrong. -- Nick http://www.inet.net.nz/~nickrob 2007-06-24 Nick Roberts * gdbint.texinfo (Target Architecture Definition): Break sections into nodes and add a menu. *** gdbint.texinfo 09 May 2007 19:48:39 +1200 1.261 --- gdbint.texinfo 24 Jun 2007 12:23:17 +1200 *************** The target architecture object is implem *** 2571,2576 **** --- 2571,2593 ---- @code{struct gdbarch *}. The structure, and its methods, are generated using the Bourne shell script @file{gdbarch.sh}. + @menu + * Operating System ABI Variant Handling:: + * Initializing a New Architecture:: + * Registers and Memory:: + * Pointers Are Not Always Addresses:: + * Address Classes:: + * Raw and Virtual Register Representations:: + * Using Different Register and Memory Data Representations:: + * Frame Interpretation:: + * Inferior Call Setup:: + * Compiler Characteristics:: + * Target Conditionals:: + * Adding a New Target:: + * Converting an existing Target Architecture to Multi-arch:: + @end menu + + @node Operating System ABI Variant Handling @section Operating System ABI Variant Handling @cindex OS ABI variants *************** from the note. This function should be *** 2730,2735 **** --- 2747,2753 ---- @code{bfd_map_over_sections}. @end deftypefun + @node Initializing a New Architecture @section Initializing a New Architecture Each @code{gdbarch} is associated with a single @sc{bfd} architecture, *************** However, @value{GDBN} now fills in @var{ *** 2765,2770 **** --- 2783,2789 ---- so new @code{gdbarch} initialization functions should not take defaults from @var{arches}. + @node Registers and Memory @section Registers and Memory @value{GDBN}'s model of the target machine is rather simple. *************** and to reflect that in the @code{REGISTE *** 2779,2784 **** --- 2798,2804 ---- @value{GDBN} can handle big-endian, little-endian, and bi-endian architectures. + @node Pointers Are Not Always Addresses @section Pointers Are Not Always Addresses @cindex pointer representation @cindex address representation *************** This function may safely assume that @va *** 2910,2915 **** --- 2930,2936 ---- C@t{++} reference type. @end deftypefn + @node Address Classes @section Address Classes @cindex address classes @cindex DW_AT_byte_size *************** type = int * @@short *** 2996,3001 **** --- 3017,3023 ---- @end smallexample + @node Raw and Virtual Register Representations @section Raw and Virtual Register Representations @cindex raw register representation @cindex virtual register representation *************** their @var{reg} and @var{type} arguments *** 3104,3109 **** --- 3126,3132 ---- @end deftypefn + @node Using Different Register and Memory Data Representations @section Using Different Register and Memory Data Representations @cindex register representation @cindex memory representation *************** the @code{CONVERT_REGISTER_P} macro retu *** 3182,3194 **** See @file{mips-tdep.c}. It does not do what you want. @end deftypefn ! @section Frame Interpretation @section Inferior Call Setup @section Compiler Characteristics @section Target Conditionals This section describes the macros that you can use to define the target --- 3205,3220 ---- See @file{mips-tdep.c}. It does not do what you want. @end deftypefn ! @node Frame Interpretation @section Frame Interpretation + @node Inferior Call Setup @section Inferior Call Setup + @node Compiler Characteristics @section Compiler Characteristics + @node Target Conditionals @section Target Conditionals This section describes the macros that you can use to define the target *************** allocate some memory in the inferior. Th *** 4255,4260 **** --- 4281,4287 ---- @end ftable + @node Adding a New Target @section Adding a New Target @cindex adding a target *************** that just @code{#include}s @file{tm-@var *** 4313,4318 **** --- 4340,4346 ---- @file{config/tm-@var{os}.h}. + @node Converting an existing Target Architecture to Multi-arch @section Converting an existing Target Architecture to Multi-arch @cindex converting targets to multi-arch