From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 24561 invoked by alias); 5 Oct 2004 20:09:39 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 24548 invoked from network); 5 Oct 2004 20:09:38 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sourceware.org with SMTP; 5 Oct 2004 20:09:38 -0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.12.11/8.12.10) with ESMTP id i95K9S2e004072 for ; Tue, 5 Oct 2004 16:09:38 -0400 Received: from pobox.corp.redhat.com (pobox.corp.redhat.com [172.16.52.156]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id i95K9Rr25261 for ; Tue, 5 Oct 2004 16:09:27 -0400 Received: from localhost.redhat.com (devserv.devel.redhat.com [172.16.58.1]) by pobox.corp.redhat.com (8.12.8/8.12.8) with ESMTP id i95K9QPh022307 for ; Tue, 5 Oct 2004 16:09:27 -0400 Received: by localhost.redhat.com (Postfix, from userid 469) id 6F75F1A467A; Tue, 5 Oct 2004 10:11:02 -0400 (EDT) From: Elena Zannoni MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-ID: <16738.43894.331901.724973@localhost.redhat.com> Date: Tue, 05 Oct 2004 20:09:00 -0000 To: gdb-patches@sources.redhat.com Subject: Re: [PATCH] SH 2a - Part 1: Basic cpu type and register handling In-Reply-To: <20040909124104.GA1912@cygbert.vinschen.de> References: <20040909124104.GA1912@cygbert.vinschen.de> X-SW-Source: 2004-10/txt/msg00096.txt.bz2 Corinna Vinschen writes: > Hi, > > this and the following three patches override what Alex already submitted > on 2004-07-29. I decided to split the big SH 2a introduction patch into > four parts, each one easy digestible: > > Part 1: Basic cpu type and register handling > Part 2: Prologue and epilogue analyzing > Part 3: Bank register handling > Part 4: Begin using RETURN_VALUE > > This is the first patch. It introduces the new target types sh2a and > sh2a_nofpu. The patch concentrates only on the necessary stuff to get > SH 2a in, so it basically only adds functions and structures to support > the new register set. The new register set adds a couple of registers > which require to raise the value of SH_NUM_REGS from 59 to 67. > OK