[PATCH] fix trap in parallel for m32r-sim

Kazuhiro Inaoka
2004-01-16T03:26:37Z

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Hi Andrew,

This is a patch for illegal trap operation in parallel.

Please commit it.

sim/m32r/ChangeLog

2004-01-16 Kazuhiro Inaoka < inaoka dot kazuhiro at renesas dot com >

* mloopx.in (emit_parallel,emit_full_parallel,xextract-pbb): Fixed
trap operation in parallel.
* mloop2.in (emit_parallel,emit_full_parallel,xextract-pbb): Ditto.

Regards,

Kazuhiro Inaoka

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Index: mloop2.in
===================================================================
RCS file: /cvs/src/src/sim/m32r/mloop2.in,v
retrieving revision 1.1
diff -c -r1.1 mloop2.in
*** mloop2.in 12 Dec 2003 16:35:21 -0000 1.1
--- mloop2.in 16 Jan 2004 03:02:56 -0000
***************
*** 107,112 ****
--- 107,121 ----
with the first insn. */
/* ??? Revisit to handle exceptions right. */

+ /* FIXME: trap in parallel */
+ if (((insn >> 16) & 0xfff0) == 0x10f0)
+ {
+ /* FIXME: "trap || insn" ==> "insn -> trap" */
+ id = emit_16 (current_cpu, pc + 2, insn & 0x7fff, sc, fast_p, 0);
+ id2 = emit_16 (current_cpu, pc, insn >> 16, sc + 1, fast_p, 0);
+ return id;
+ }
+
/* FIXME: No need to handle this parallely if second is nop. */
id = emit_16 (current_cpu, pc, insn >> 16, sc, fast_p, 1);

***************
*** 136,141 ****
--- 145,159 ----
with the first insn. */
/* ??? Revisit to handle exceptions right. */

+ /* FIXME: trap in parallel */
+ if (((insn >> 16) & 0xfff0) == 0x10f0)
+ {
+ /* FIXME: "trap || insn" ==> "insn -> trap" */
+ id = emit_full16 (current_cpu, pc + 2, insn & 0x7fff, sc, 0, 0);
+ id2 = emit_full16 (current_cpu, pc, insn >> 16, sc + 3, 0, 0);
+ return id;
+ }
+
@cpu@_emit_before (current_cpu, sc, pc, 1);

/* FIXME: No need to handle this parallelly if second is nop. */
***************
*** 289,303 ****
{
if ((insn & 0x8000) != 0) /* parallel? */
{
/* Yep. Here's the "interesting" [sic] part. */
idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! sc += 3;
! max_insns -= 3;
icount += 2;
pc += 4;
if (IDESC_CTI_P (idesc))
{
! SET_CTI_VPC (sc - 3);
break;
}
}
--- 307,326 ----
{
if ((insn & 0x8000) != 0) /* parallel? */
{
+ int up_count = 3;
+ /* FIXME: trap in parallel */
+ if (((insn >> 16) & 0xfff0) == 0x10f0)
+ up_count = 2;
+
/* Yep. Here's the "interesting" [sic] part. */
idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! sc += up_count;
! max_insns -= up_count;
icount += 2;
pc += 4;
if (IDESC_CTI_P (idesc))
{
! SET_CTI_VPC (sc - up_count);
break;
}
}
***************
*** 383,392 ****
}
else
{
idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
cti_sc = sc;
! sc += 3;
! max_insns -= 3;
}
icount += 2;
pc += 4;
--- 406,420 ----
}
else
{
+ int up_count = 3;
+ /* FIXME: trap in parallel */
+ if (((insn >> 16) & 0xfff0) == 0x10f0)
+ up_count = 2;
+
idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
cti_sc = sc;
! sc += up_count;
! max_insns -= up_count;
}
icount += 2;
pc += 4;
Index: mloopx.in
===================================================================
RCS file: /cvs/src/src/sim/m32r/mloopx.in,v
retrieving revision 1.1.1.1
diff -c -r1.1.1.1 mloopx.in
*** mloopx.in 12 Oct 1999 04:37:53 -0000 1.1.1.1
--- mloopx.in 16 Jan 2004 03:02:57 -0000
***************
*** 107,112 ****
--- 107,121 ----
with the first insn. */
/* ??? Revisit to handle exceptions right. */

+ /* FIXME: trap in parallel */
+ if (((insn >> 16) & 0xfff0) == 0x10f0)
+ {
+ /* FIXME: "trap || insn" ==> "insn -> trap" */
+ id = emit_16 (current_cpu, pc + 2, insn & 0x7fff, sc, fast_p, 0);
+ id2 = emit_16 (current_cpu, pc, insn >> 16, sc + 1, fast_p, 0);
+ return id;
+ }
+
/* FIXME: No need to handle this parallely if second is nop. */
id = emit_16 (current_cpu, pc, insn >> 16, sc, fast_p, 1);

***************
*** 136,141 ****
--- 145,159 ----
with the first insn. */
/* ??? Revisit to handle exceptions right. */

+ /* FIXME: trap in parallel */
+ if (((insn >> 16) & 0xfff0) == 0x10f0)
+ {
+ /* FIXME: "trap || insn" ==> "insn -> trap" */
+ id = emit_full16 (current_cpu, pc + 2, insn & 0x7fff, sc, 0, 0);
+ id2 = emit_full16 (current_cpu, pc, insn >> 16, sc + 3, 0, 0);
+ return id;
+ }
+
@cpu@_emit_before (current_cpu, sc, pc, 1);

/* FIXME: No need to handle this parallelly if second is nop. */
***************
*** 289,303 ****
{
if ((insn & 0x8000) != 0) /* parallel? */
{
/* Yep. Here's the "interesting" [sic] part. */
idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! sc += 3;
! max_insns -= 3;
icount += 2;
pc += 4;
if (IDESC_CTI_P (idesc))
{
! SET_CTI_VPC (sc - 3);
break;
}
}
--- 307,326 ----
{
if ((insn & 0x8000) != 0) /* parallel? */
{
+ int up_count = 3;
+ /* FIXME: trap in parallel */
+ if (((insn >> 16) & 0xfff0) == 0x10f0)
+ up_count = 2;
+
/* Yep. Here's the "interesting" [sic] part. */
idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! sc += up_count;
! max_insns -= up_count;
icount += 2;
pc += 4;
if (IDESC_CTI_P (idesc))
{
! SET_CTI_VPC (sc - up_count);
break;
}
}
***************
*** 383,392 ****
}
else
{
idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
cti_sc = sc;
! sc += 3;
! max_insns -= 3;
}
icount += 2;
pc += 4;
--- 406,420 ----
}
else
{
+ int up_count = 3;
+ /* FIXME: trap in parallel */
+ if (((insn >> 16) & 0xfff0) == 0x10f0)
+ up_count = 2;
+
idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
cti_sc = sc;
! sc += up_count;
! max_insns -= up_count;
}
icount += 2;
pc += 4;