[PATCH 7/7] RISC-V: Add documents and --help for the new GAS and OBJDUMP options.

[Nelson Chu <nelson.chu@sifive.com>]

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	gas/
	* config/tc-riscv.c (md_show_usage): Add descriptions about
	the new GAS options.
	* doc/c-riscv.texi: Likewise.

	opcodes/
	* riscv-dis.c (print_riscv_disassembler_options): Add description
	about the new OBJDUMP option.
---
 gas/config/tc-riscv.c | 19 +++++++++++--------
 gas/doc/c-riscv.texi  | 35 +++++++++++++++++++++++++++++++++++
 opcodes/riscv-dis.c   |  9 ++++++---
 3 files changed, 52 insertions(+), 11 deletions(-)

diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 81bdfa8..95f787f 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -3490,14 +3490,17 @@ md_show_usage (FILE *stream)
 {
   fprintf (stream, _("\
 RISC-V options:\n\
-  -fpic          generate position-independent code\n\
-  -fno-pic       don't generate position-independent code (default)\n\
-  -march=ISA     set the RISC-V architecture\n\
-  -mabi=ABI      set the RISC-V ABI\n\
-  -mrelax        enable relax (default)\n\
-  -mno-relax     disable relax\n\
-  -march-attr    generate RISC-V arch attribute\n\
-  -mno-arch-attr don't generate RISC-V arch attribute\n\
+  -fpic                       generate position-independent code\n\
+  -fno-pic                    don't generate position-independent code (default)\n\
+  -march=ISA                  set the RISC-V architecture\n\
+  -misa-spec=ISAspec          set the RISC-V ISA spec (2p0, 2p1, 2p2, 20190608, 20191213)\n\
+  -mriscv-isa-version=ISAver  update the default version of RISC-V architecture\n\
+  -mpriv-spec=PRIVspec        set the RISC-V privilege spec (1p9, 1p9p1, 1p10, 1p11)\n\
+  -mabi=ABI                   set the RISC-V ABI\n\
+  -mrelax                     enable relax (default)\n\
+  -mno-relax                  disable relax\n\
+  -march-attr                 generate RISC-V arch attribute\n\
+  -mno-arch-attr              don't generate RISC-V arch attribute\n\
 "));
 }
 
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index 488cf56..559c87a 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -42,6 +42,41 @@ Don't generate position-independent code (default)
 @cindex @samp{-march=ISA} option, RISC-V
 @item -march=ISA
 Select the base isa, as specified by ISA.  For example -march=rv32ima.
+If this option and the architecture attributes aren’t set, then assembler
+will check the default configure setting --with-arch=ISA.
+
+@cindex @samp{-misa-spec=ISAspec} option, RISC-V
+@item -misa-spec=ISAspec
+Select the default isa spec version.  If the version of ISA isn't set
+by -march, then assembler helps to set the version according to
+the default chosen spec.  If this option isn't set, then assembler will
+check the default configure setting --with-isa-spec=ISAspec.
+
+@cindex @samp{-mriscv-isa-version=ISAver} option, RISC-V
+@item -mriscv-isa-version=ISAver
+The syntax of ISAver is same as the ISA set by -march, but must set with
+versions, and without the rv32 or rv64 prefix.  For example
+-mriscv-isa-version=i2p0m2p0a2p0.  There are two reasons that you may need
+this option,
+
+Some versions of extensions defined in the ISA spec are not matched to the
+toolchain’s implementation.  For example, V-ext is defined to version 0.7 in
+ISA spec, but we only have implementations for 0.8 and 0.9.  Therefore, you
+have to use this option to choose the correct version for V-ext.
+
+The other reason is that you want to update the version for the specific
+standard extensions if the version are not set in the ELF architecture
+attributes or -march option.
+
+If this option isn't set, then assembler will check the default configure
+setting --with-riscv-isa-version=ISAver.
+
+@cindex @samp{-mpriv-spec=PRIVspec} option, RISC-V
+@item -mpriv-spec=PRIVspec
+Select the privileged spec version.  We can decide whether the CSR is valid or
+not according to the chosen spec.  If this option and the privilege attributes
+aren't set, then assembler will check the default configure setting
+--with-priv-spec=PRIVspec.
 
 @cindex @samp{-mabi=ABI} option, RISC-V
 @item -mabi=ABI
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 38ae8ac..b558282 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -601,11 +601,14 @@ The following RISC-V-specific disassembler options are supported for use\n\
 with the -M switch (multiple options should be separated by commas):\n"));
 
   fprintf (stream, _("\n\
-  numeric       Print numeric register names, rather than ABI names.\n"));
+  numeric         Print numeric register names, rather than ABI names.\n"));
 
   fprintf (stream, _("\n\
-  no-aliases    Disassemble only into canonical instructions, rather\n\
-                than into pseudoinstructions.\n"));
+  no-aliases      Disassemble only into canonical instructions, rather\n\
+                  than into pseudoinstructions.\n"));
+
+  fprintf (stream, _("\n\
+  priv-spec=PRIV  Print the CSR according to the chosen privilege spec.\n"));
 
   fprintf (stream, _("\n"));
 }
-- 
2.7.4