Re: [PATCH v8 3/7] Refactor arm_software_single_step to use regcache

Yao Qi
2016-01-18T13:07:26Z

Yao Qi <qiyaoltc@gmail.com> writes:

> As a record, this patch causes regressions at least in
> gdb.base/sigstep.exp,
>
> (gdb) PASS: gdb.base/sigstep.exp: continue to handler, si+advance in
> handler, step from handler: advance in handler
> step^M
> 39 } /* handler */^M
> 1: x/i $pc^M
> => 0x8740 <handler+80>: sub sp, r11, #0^M
> (gdb) step^M
> ^M
> Program received signal SIGSEGV, Segmentation fault.^M
> setitimer () at ../sysdeps/unix/syscall-template.S:81^M
> 81 ../sysdeps/unix/syscall-template.S: No such file or directory.^M
> 1: x/i $pc^M
> => 0xb6eff9c0 <setitimer>: push {r7}^M
> (gdb) FAIL: gdb.base/sigstep.exp: continue to handler, si+advance in
> handler, step from handler: leave handler
>
> Could you take a look at it?

Here is my patch fixing the regression in sigstep.exp. The regression
test is running now.

--
Yao (齐尧)
From 1c46ba5ca260289788ed2db3c22f110b44481856 Mon Sep 17 00:00:00 2001
From: Yao Qi <yao.qi@linaro.org>
Date: Mon, 18 Jan 2016 12:55:26 +0000
Subject: [PATCH] Detect the arm/thumb mode of code SIGRETURN or RT_SIGRETURN
returns to

This patch fixes the following regression introduced by commit d0e59a68

step^M
39 } /* handler */^M
1: x/i $pc^M
=> 0x8740 <handler+80>: sub sp, r11, #0^M
(gdb) step^M
^M
Program received signal SIGSEGV, Segmentation fault.^M
setitimer () at ../sysdeps/unix/syscall-template.S:81^M
81 ../sysdeps/unix/syscall-template.S: No such file or directory.^M
1: x/i $pc^M
=> 0xb6eff9c0 <setitimer>: push {r7}^M
(gdb) FAIL: gdb.base/sigstep.exp: continue to handler, si+advance in handler, step from handler: leave handler

in my test setting, program is compiled in arm mode, but the glibc
is built in thumb mode, so when we do 'step' to step over syscall
instruction svc for SIGRETURN, GDB should set breakpoint for arm mode
in the program, even though the current program in glibc is in thumb
mode. Current GDB doesn't consider the case that the mode of program
SIGRETURN goes to can be different from current program mode.

In fact, GDB has taken care of this arm/thumb mode changes already,
see

/* Copy the value of next pc of sigreturn and rt_sigrturn into PC,
return 1. In addition, set IS_THUMB depending on whether we
will return to ARM or Thumb code. Return 0 if it is not a
rt_sigreturn/sigreturn syscall. */
static int
arm_linux_sigreturn_return_addr (struct frame_info *frame,
unsigned long svc_number,
CORE_ADDR *pc, int *is_thumb)

but in the commit d0e59a68

> - arm_linux_sigreturn_return_addr (frame, svc_number, &return_addr, &is_thumb);
> + if (svc_number == ARM_SIGRETURN || svc_number == ARM_RT_SIGRETURN)
> + next_pc = arm_linux_sigreturn_next_pc (regcache, svc_number);

the IS_THUMB setting is lost, so it is a regression.

gdb:

2016-01-18 Yao Qi <yao.qi@linaro.org>

* arm-linux-tdep.c (arm_linux_sigreturn_next_pc): Add parameter
is_thumb and set it according to CPSR saved on the stack.
(arm_linux_get_next_pcs_syscall_next_pc): Pass is_thumb to
arm_linux_sigreturn_next_pc.

gdb/gdbserver:

2016-01-18 Yao Qi <yao.qi@linaro.org>

* linux-arm-low.c (arm_sigreturn_next_pc): Add parameter
is_thumb and set it according to CPSR saved on the stack.
(get_next_pcs_syscall_next_pc): Pass is_thumb to
arm_sigreturn_next_pc.

diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c
index 2306bda..f6a831a 100644
--- a/gdb/arm-linux-tdep.c
+++ b/gdb/arm-linux-tdep.c
@@ -782,10 +782,12 @@ arm_linux_sigreturn_return_addr (struct frame_info *frame,
}

/* Find the value of the next PC after a sigreturn or rt_sigreturn syscall
- based on current processor state. */
+ based on current processor state. In addition, set IS_THUMB depending
+ on whether we will return to ARM or Thumb code. */
+
static CORE_ADDR
arm_linux_sigreturn_next_pc (struct regcache *regcache,
- unsigned long svc_number)
+ unsigned long svc_number, int *is_thumb)
{
ULONGEST sp;
unsigned long sp_data;
@@ -794,6 +796,7 @@ arm_linux_sigreturn_next_pc (struct regcache *regcache,
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int pc_offset = 0;
int is_sigreturn = 0;
+ CORE_ADDR cpsr;

gdb_assert (svc_number == ARM_SIGRETURN
|| svc_number == ARM_RT_SIGRETURN);
@@ -807,6 +810,10 @@ arm_linux_sigreturn_next_pc (struct regcache *regcache,

next_pc = read_memory_unsigned_integer (sp + pc_offset, 4, byte_order);

+ /* Set IS_THUMB according the CPSR saved on the stack. */
+ cpsr = read_memory_unsigned_integer (sp + pc_offset + 4, 4, byte_order);
+ *is_thumb = ((cpsr & arm_psr_thumb_bit (gdbarch)) != 0);
+
return next_pc;
}

@@ -899,7 +906,12 @@ arm_linux_get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self,
}

if (svc_number == ARM_SIGRETURN || svc_number == ARM_RT_SIGRETURN)
- next_pc = arm_linux_sigreturn_next_pc (self->regcache, svc_number);
+ {
+ /* SIGRETURN or RT_SIGRETURN may affect the arm thumb mode, so
+ update IS_THUMB. */
+ next_pc = arm_linux_sigreturn_next_pc (self->regcache, svc_number,
+ &is_thumb);
+ }

/* Addresses for calling Thumb functions have the bit 0 set. */
if (is_thumb)
diff --git a/gdb/gdbserver/linux-arm-low.c b/gdb/gdbserver/linux-arm-low.c
index 927a6fa..01a3bc0 100644
--- a/gdb/gdbserver/linux-arm-low.c
+++ b/gdb/gdbserver/linux-arm-low.c
@@ -769,16 +769,20 @@ arm_prepare_to_resume (struct lwp_info *lwp)
}
}

-/* Find the next pc for a sigreturn or rt_sigreturn syscall.
+/* Find the next pc for a sigreturn or rt_sigreturn syscall. In
+ addition, set IS_THUMB depending on whether we will return to ARM
+ or Thumb code.
See arm-linux.h for stack layout details. */
static CORE_ADDR
-arm_sigreturn_next_pc (struct regcache *regcache, int svc_number)
+arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
+ int *is_thumb)
{
unsigned long sp;
unsigned long sp_data;
/* Offset of PC register. */
int pc_offset = 0;
CORE_ADDR next_pc = 0;
+ CORE_ADDR cpsr;

gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);

@@ -790,6 +794,10 @@ arm_sigreturn_next_pc (struct regcache *regcache, int svc_number)

(*the_target->read_memory) (sp + pc_offset, (unsigned char *) &next_pc, 4);

+ /* Set IS_THUMB according the CPSR saved on the stack. */
+ (*the_target->read_memory) (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
+ *is_thumb = ((cpsr & CPSR_T) != 0);
+
return next_pc;
}

@@ -831,7 +839,9 @@ get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self, CORE_ADDR pc)
/* This is a sigreturn or sigreturn_rt syscall. */
if (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn)
{
- next_pc = arm_sigreturn_next_pc (regcache, svc_number);
+ /* SIGRETURN or RT_SIGRETURN may affect the arm thumb mode, so
+ update IS_THUMB. */
+ next_pc = arm_sigreturn_next_pc (regcache, svc_number, &is_thumb);
}

/* Addresses for calling Thumb functions have the bit 0 set. */