From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 9542 invoked by alias); 17 Dec 2015 13:24:37 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 9518 invoked by uid 89); 17 Dec 2015 13:24:36 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.8 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,T_RP_MATCHES_RCVD autolearn=no version=3.3.2 spammy=trademarks, H*r:sk:wtedesc, subsubsection, @subsubsection X-HELO: mga01.intel.com Received: from mga01.intel.com (HELO mga01.intel.com) (192.55.52.88) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 17 Dec 2015 13:24:35 +0000 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP; 17 Dec 2015 05:24:33 -0800 X-ExtLoop1: 1 Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga002.jf.intel.com with ESMTP; 17 Dec 2015 05:24:32 -0800 Received: from ulvlx001.iul.intel.com (ulvlx001.iul.intel.com [172.28.207.17]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id tBHDOV7N020863; Thu, 17 Dec 2015 13:24:31 GMT Received: from ulvlx001.iul.intel.com (localhost [127.0.0.1]) by ulvlx001.iul.intel.com with ESMTP id tBHDOVxr011802; Thu, 17 Dec 2015 14:24:31 +0100 Received: (from wtedesch@localhost) by ulvlx001.iul.intel.com with œ id tBHDOVL4011798; Thu, 17 Dec 2015 14:24:31 +0100 From: Walfred Tedeschi To: eliz@gnu.org Cc: gdb-patches@sourceware.org, Walfred Tedeschi Subject: [OBV PATCH] MPX documentation Date: Thu, 17 Dec 2015 13:24:00 -0000 Message-Id: <1450358668-11765-1-git-send-email-walfred.tedeschi@intel.com> X-IsSubscribed: yes X-SW-Source: 2015-12/txt/msg00324.txt.bz2 Fix some trademarks on MPX section. 2015-12-15 Walfred Tedeschi doc: gdb.texinfo: (Intel(R) Memory Protection Extensions): Fix trademarks. --- gdb/doc/gdb.texinfo | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index fd7fc24..43e13bf 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -22013,15 +22013,16 @@ from functions. @subsubsection Intel(R) @dfn{Memory Protection Extensions} (MPX). -@cindex Intel(R) Memory Protection Extensions (MPX). - -Memory Protection Extension (MPX) adds the bound registers @samp{BND0} -@footnote{The register named with capital letters represent the architecture -registers.} through @samp{BND3}. Bound registers store a pair of 64-bit values -which are the lower bound and upper bound. Bounds are effective addresses or -memory locations. The upper bounds are architecturally represented in 1's -complement form. A bound having lower bound = 0, and upper bound = 0 -(1's complement of all bits set) will allow access to the entire address space. +@cindex Intel(R) Memory Protection Extensions (Intel(R) MPX). + +Intel(R) Memory Protection Extension (Intel(R) MPX) adds the bound +registers @samp{BND0} @footnote{The register named with capital +letters represent the architecture registers.} through @samp{BND3}. +Bound registers store a pair of 64-bit values which are the lower bound +and upper bound. Bounds are effective addresses or memory locations. +The upper bounds are architecturally represented in 1's complement form. +A bound having lower bound = 0, and upper bound = 0 (1's complement of +all bits set) will allow access to the entire address space. @samp{BND0} through @samp{BND3} are represented in @value{GDBN} as @samp{bnd0raw} through @samp{bnd3raw}. Pseudo registers @samp{bnd0} through @samp{bnd3} -- 2.1.4