From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 85815 invoked by alias); 21 Sep 2015 14:55:29 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 85763 invoked by uid 89); 21 Sep 2015 14:55:29 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: mga14.intel.com Received: from mga14.intel.com (HELO mga14.intel.com) (192.55.52.115) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 21 Sep 2015 14:55:27 +0000 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP; 21 Sep 2015 07:54:53 -0700 X-ExtLoop1: 1 Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga003.jf.intel.com with ESMTP; 21 Sep 2015 07:54:45 -0700 Received: from ulvlx001.iul.intel.com (ulvlx001.iul.intel.com [172.28.207.17]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id t8LEsiLV014466; Mon, 21 Sep 2015 15:54:44 +0100 Received: from ulvlx001.iul.intel.com (localhost [127.0.0.1]) by ulvlx001.iul.intel.com with ESMTP id t8LEsi9E010471; Mon, 21 Sep 2015 16:54:44 +0200 Received: (from mmetzger@localhost) by ulvlx001.iul.intel.com with œ id t8LEshEM010467; Mon, 21 Sep 2015 16:54:43 +0200 From: Markus Metzger To: palves@redhat.com, dje@google.com Cc: gdb-patches@sourceware.org Subject: [PATCH 0/6] disasm, record: fix "record instruction-history /m" Date: Mon, 21 Sep 2015 14:55:00 -0000 Message-Id: <1442847283-10200-1-git-send-email-markus.t.metzger@intel.com> X-IsSubscribed: yes X-SW-Source: 2015-09/txt/msg00510.txt.bz2 The /m modifier interleaves source lines with the disassembly of recorded instructions. This calls disasm.c's do_mixed_source_and_assembly once for each recorded instruction to be printed. The latter really does a source print with intermixed disassembly. To that purpose, it may reorder instructions to better match the source. This doesn't work for printing a single instruction. The new DISASSEMBLY_SOURCE mode promises to improve that as it preserves the order of instructions. It still assumes a consecutive range of instructions in some places. Extend it so it can be used for source interleaving in the "record instruction-history" command. There is an open regarding MI output of "record instruction-history". The current version seems pretty broken as it will put each instruction into its own "asm_insns" list. This isn't that bad since there is no real MI support for record btrace, yet. This new version puts all instructions into the same list - unless there are gaps in the trace. For gaps, we will end up with one list per consecutive trace segment plus the error message for the gaps. To get this also into a single "asm_insns" list, we'd need to further extend struct disas_insn to support gaps instead of instructions. I have not done this as I first wanted to see if the current changes are not already too intrusive. See also branch users/mmetzger/disasm-vec. I tested this series on 64-bit IA running RHEL 7. Markus Metzger (6): disasm: change dump_insns to print a single instruction disasm: add struct disas_insn to describe to-be-disassembled instruction disas: add gdb_disassembly_vec disasm: use entire line table in line_has_code_p disasm: determine preceding lines independent of last_line btrace: use gdb_disassembly_vec and new source interleaving method gdb/disasm.c | 549 +++++++++++++++++++++++++++------------------------- gdb/disasm.h | 24 +++ gdb/record-btrace.c | 54 +++--- gdb/record.c | 2 +- 4 files changed, 341 insertions(+), 288 deletions(-) -- 1.8.3.1