From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12079 invoked by alias); 21 Oct 2014 00:57:28 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 12008 invoked by uid 89); 21 Oct 2014 00:57:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pd0-f169.google.com Received: from mail-pd0-f169.google.com (HELO mail-pd0-f169.google.com) (209.85.192.169) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 21 Oct 2014 00:57:26 +0000 Received: by mail-pd0-f169.google.com with SMTP id w10so207973pde.0 for ; Mon, 20 Oct 2014 17:57:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XJhJzEPIjmRJaiUb2/zaS8j4/LY1zr+nJibeneDEYzM=; b=IYhdtQqfpGg1mCpUoS33ErzuBURe3fV62MV0hxW2aC0gDA7PU+PAze6pEo+UOxA3MB O8xoBa3Zp5kijcMG24f+8pMAIakdeVtHgAXdJ5DvvNpTRy3fkm1geIZ3Q2Xuh2WFJr4N jGBJ41Z9KdC+GxUzGZ0QuH2e8CGPxhcy2FKH/LBbALJNtz26Z2WsFDOWAtaxxNHbjhM1 9zp2Az2RzHGbhmRDWXQVpZvl8/LBGvEOGuF+wgBqIDwvh8CFihour72GWwchVzcV+GY0 eP5J7slq7lNeLxIBRfAGXKqESOEkpcYuHjpkQU9IK2lBki1JyG6NDqDpaCYgQvOO0j9g jM8Q== X-Gm-Message-State: ALoCoQmpJCsPY8UBkGrFL/rrBfO40P3V9V0fbFNgEXyxudt4Scy0RXBVj/DExU/e8HrT2Nt2UbSw X-Received: by 10.68.101.131 with SMTP id fg3mr7265305pbb.130.1413853044698; Mon, 20 Oct 2014 17:57:24 -0700 (PDT) Received: from kamensky-w530.cisco.com.net ([24.6.79.41]) by mx.google.com with ESMTPSA id g15sm10230692pdm.68.2014.10.20.17.57.23 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Oct 2014 17:57:24 -0700 (PDT) From: Victor Kamensky To: gdb-patches@sourceware.org Cc: victor.kamensky@linaro.org Subject: [PATCH 1/5] ARM: plt_size functions need to read instructions in right byte order Date: Tue, 21 Oct 2014 00:57:00 -0000 Message-Id: <1413853021-4393-2-git-send-email-victor.kamensky@linaro.org> In-Reply-To: <1413853021-4393-1-git-send-email-victor.kamensky@linaro.org> References: <1413853021-4393-1-git-send-email-victor.kamensky@linaro.org> X-SW-Source: 2014-10/txt/msg00528.txt.bz2 elf32_arm_plt0_size and elf32_arm_plt_size read instructions to determine what is size of PLT entry. However it does not read instruction correctly in case of ARM big endian V7 case. In this case instructions are still kept in little endian order (BE8). Because of that in armv7b case gdb.base/dprintf-pending.exp test is failing - It cannot find 'pendfunc@plt' symbol. And that symbol is not created because elf32_arm_get_synthetic_symtab function does not create 'pendfunc@plt' symbol for symbols from PLT after elf32_arm_plt0_size returns -1. Fix is to introduce code reading functions read_code32, read_code16 which would read code content in little endian mode when it is armv7b executabe (i.e e_flags has EF_ARM_BE8) set. elf32_arm_plt0_size and elf32_arm_plt_size to use these functions in place where H_GET_32, H_GET_16 were used before. --- bfd/ChangeLog | 9 +++++++++ bfd/elf32-arm.c | 48 ++++++++++++++++++++++++++++++++++++++++++++---- 2 files changed, 53 insertions(+), 4 deletions(-) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index e4445dc..8b183ac 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,12 @@ +2014-10-13 Victor Kamensky + + * elf32-arm.c (read_code32): New function to read 32 bit + arm instruction. + (read_code16): New function to read 16 bit thumb instrution. + (elf32_arm_plt0_size, elf32_arm_plt_size) change code to use + read_code32, read_code16 to read instruction to deal with + BE8 arm case. + 2014-09-29 H.J. Lu PR ld/17440 diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index 08aa3f9..89e4f35 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -15953,6 +15953,46 @@ const struct elf_size_info elf32_arm_size_info = bfd_elf32_swap_reloca_out }; +static bfd_vma +read_code32 (const bfd *abfd, const bfd_byte *addr) +{ + bfd_vma retval; + + if ((elf_elfheader(abfd)->e_flags) & EF_ARM_BE8) + { + /* + * V7 BE8 code is always little endian + */ + retval = bfd_getl32(addr); + } + else + { + retval = H_GET_32(abfd, addr); + } + return retval; +} + + +static bfd_vma +read_code16 (const bfd *abfd, const bfd_byte *addr) +{ + bfd_vma retval; + + if ((elf_elfheader(abfd)->e_flags) & EF_ARM_BE8) + { + /* + * V7 BE8 code is always little endian + */ + retval = bfd_getl16(addr); + } + else + { + retval = H_GET_16(abfd, addr); + } + return retval; +} + + /* Return size of plt0 entry starting at ADDR or (bfd_vma) -1 if size can not be determined. */ @@ -15962,7 +16002,7 @@ elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr) bfd_vma first_word; bfd_vma plt0_size; - first_word = H_GET_32 (abfd, addr); + first_word = read_code32 (abfd, addr); if (first_word == elf32_arm_plt0_entry[0]) plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry); @@ -15987,17 +16027,17 @@ elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset) const bfd_byte *addr = start + offset; /* PLT entry size if fixed on Thumb-only platforms. */ - if (H_GET_32(abfd, start) == elf32_thumb2_plt0_entry[0]) + if (read_code32(abfd, start) == elf32_thumb2_plt0_entry[0]) return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry); /* Respect Thumb stub if necessary. */ - if (H_GET_16(abfd, addr) == elf32_arm_plt_thumb_stub[0]) + if (read_code16(abfd, addr) == elf32_arm_plt_thumb_stub[0]) { plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub); } /* Strip immediate from first add. */ - first_insn = H_GET_32(abfd, addr + plt_size) & 0xffffff00; + first_insn = read_code32(abfd, addr + plt_size) & 0xffffff00; #ifdef FOUR_WORD_PLT if (first_insn == elf32_arm_plt_entry[0]) -- 1.8.1.4