From: Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
To: gdb-patches@sourceware.org
Cc: Ulrich Weigand <uweigand@de.ibm.com>
Subject: [PATCH] ppc64le/gdbserver: Fix ppc_collect/supply_ptrace_register() routines
Date: Fri, 05 Sep 2014 20:00:00 -0000 [thread overview]
Message-ID: <1409947102-32166-1-git-send-email-emachado@linux.vnet.ibm.com> (raw)
Hi,
this patch fixes the routines to collect and supply ptrace registers on ppc64le
gdbserver. Originally written for big endian arch, they were causing several
issues on little endian. With this fix, the number of unexpected failures in
the testsuite dropped from 263 to 72 on ppc64le.
Tested on ppc64{,le}. Ok?
Thanks and regards,
--
Edjunior
gdb/gdbserver/
2014-09-05 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
* linux-ppc-low.c (ppc_collect_ptrace_register): Adjust routine to take
endianness into account.
(ppc_supply_ptrace_register): Likewise.
---
gdb/gdbserver/linux-ppc-low.c | 37 ++++++++++++++++++++++++++++---------
1 file changed, 28 insertions(+), 9 deletions(-)
diff --git a/gdb/gdbserver/linux-ppc-low.c b/gdb/gdbserver/linux-ppc-low.c
index d743311..1898741 100644
--- a/gdb/gdbserver/linux-ppc-low.c
+++ b/gdb/gdbserver/linux-ppc-low.c
@@ -202,25 +202,44 @@ ppc_cannot_fetch_register (int regno)
static void
ppc_collect_ptrace_register (struct regcache *regcache, int regno, char *buf)
{
- int size = register_size (regcache->tdesc, regno);
-
memset (buf, 0, sizeof (long));
- if (size < sizeof (long))
- collect_register (regcache, regno, buf + sizeof (long) - size);
+ if (__BYTE_ORDER == __LITTLE_ENDIAN)
+ {
+ /* Little-endian values always sit at the left end of the buffer. */
+ collect_register (regcache, regno, buf);
+ }
+ else if (__BYTE_ORDER == __BIG_ENDIAN)
+ {
+ /* Big-endian values sit at the right end of the buffer. In case of
+ registers whose size is smaller than sizeof (long), we must use a
+ padding to access it correctly. */
+ int padding = (sizeof (long) - register_size (regcache->tdesc, regno));
+ collect_register (regcache, regno, buf + padding);
+ }
else
- collect_register (regcache, regno, buf);
+ perror_with_name ("Unexpected byte order");
}
static void
ppc_supply_ptrace_register (struct regcache *regcache,
int regno, const char *buf)
{
- int size = register_size (regcache->tdesc, regno);
- if (size < sizeof (long))
- supply_register (regcache, regno, buf + sizeof (long) - size);
+ if (__BYTE_ORDER == __LITTLE_ENDIAN)
+ {
+ /* Little-endian values always sit at the left end of the buffer. */
+ supply_register (regcache, regno, buf);
+ }
+ else if (__BYTE_ORDER == __BIG_ENDIAN)
+ {
+ /* Big-endian values sit at the right end of the buffer. In case of
+ registers whose size is smaller than sizeof (long), we must use a
+ padding to access it correctly. */
+ int padding = (sizeof (long) - register_size (regcache->tdesc, regno));
+ supply_register (regcache, regno, buf + padding);
+ }
else
- supply_register (regcache, regno, buf);
+ perror_with_name ("Unexpected byte order");
}
--
1.7.9.5
next reply other threads:[~2014-09-05 20:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-05 20:00 Edjunior Barbosa Machado [this message]
2014-09-05 22:54 ` Sergio Durigan Junior
2014-09-08 11:51 ` Ulrich Weigand
2014-09-08 14:40 ` Edjunior Barbosa Machado
2014-09-08 14:43 ` Ulrich Weigand
2014-09-08 16:51 ` Edjunior Barbosa Machado
2014-09-08 15:20 ` Sergio Durigan Junior
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