From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29365 invoked by alias); 3 Jul 2014 06:11:48 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 28871 invoked by uid 89); 3 Jul 2014 06:11:34 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL,BAYES_00 autolearn=ham version=3.3.2 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 03 Jul 2014 06:11:31 +0000 Received: from svr-orw-exc-10.mgc.mentorg.com ([147.34.98.58]) by relay1.mentorg.com with esmtp id 1X2aEy-0006PW-G0 from Yao_Qi@mentor.com for gdb-patches@sourceware.org; Wed, 02 Jul 2014 23:11:28 -0700 Received: from SVR-ORW-FEM-06.mgc.mentorg.com ([147.34.97.120]) by SVR-ORW-EXC-10.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.4675); Wed, 2 Jul 2014 23:11:28 -0700 Received: from qiyao.dyndns.org.com (147.34.91.1) by SVR-ORW-FEM-06.mgc.mentorg.com (147.34.97.120) with Microsoft SMTP Server id 14.2.247.3; Wed, 2 Jul 2014 23:11:28 -0700 From: Yao Qi To: Subject: [PATCH 1/4] Restrict matching add/sub sp, #imm Date: Thu, 03 Jul 2014 06:11:00 -0000 Message-ID: <1404367792-23234-2-git-send-email-yao@codesourcery.com> In-Reply-To: <1404367792-23234-1-git-send-email-yao@codesourcery.com> References: <1404367792-23234-1-git-send-email-yao@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain X-IsSubscribed: yes X-SW-Source: 2014-07/txt/msg00040.txt.bz2 Currently, GDB matches both add/sub sp, #imm in prologue and epilogue, which is not very precise. On the instruction level, the immediate number in both instruction can't be negative, so 'sub sp, #imm' only appears in prologue while 'add sp, #imm' only appears in epilogue. Note that on assembly level, we can write 'add sp, -8', but gas will translate to 'sub sp, 8' instruction. This patch is to only match 'sub sp, #imm' in prologue and match 'add sp, #immm' in epilogue. It paves the way for the following patch. gdb: 2014-07-02 Yao Qi * arm-tdep.c (thumb_analyze_prologue): Don't match instruction 'add sp, #immm'. (thumb_in_function_epilogue_p): Don't match 'sub sp, #imm'. --- gdb/arm-tdep.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 8cc60a4..0fc7fc1 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -737,16 +737,11 @@ thumb_analyze_prologue (struct gdbarch *gdbarch, pv_area_store (stack, regs[ARM_SP_REGNUM], 4, regs[regno]); } } - else if ((insn & 0xff00) == 0xb000) /* add sp, #simm OR - sub sp, #simm */ + else if ((insn & 0xff80) == 0xb080) /* sub sp, #simm */ { offset = (insn & 0x7f) << 2; /* get scaled offset */ - if (insn & 0x80) /* Check for SUB. */ - regs[ARM_SP_REGNUM] = pv_add_constant (regs[ARM_SP_REGNUM], - -offset); - else - regs[ARM_SP_REGNUM] = pv_add_constant (regs[ARM_SP_REGNUM], - offset); + regs[ARM_SP_REGNUM] = pv_add_constant (regs[ARM_SP_REGNUM], + -offset); } else if ((insn & 0xf800) == 0xa800) /* add Rd, sp, #imm */ regs[bits (insn, 8, 10)] = pv_add_constant (regs[ARM_SP_REGNUM], @@ -3264,7 +3259,7 @@ thumb_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) found_return = 1; else if (insn == 0x46bd) /* mov sp, r7 */ found_stack_adjust = 1; - else if ((insn & 0xff00) == 0xb000) /* add sp, imm or sub sp, imm */ + else if ((insn & 0xff80) == 0xb000) /* add sp, imm */ found_stack_adjust = 1; else if ((insn & 0xfe00) == 0xbc00) /* pop */ { @@ -3324,7 +3319,7 @@ thumb_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) if (insn2 == 0x46bd) /* mov sp, r7 */ found_stack_adjust = 1; - else if ((insn2 & 0xff00) == 0xb000) /* add sp, imm or sub sp, imm */ + else if ((insn2 & 0xff80) == 0xb000) /* add sp, imm */ found_stack_adjust = 1; else if ((insn2 & 0xff00) == 0xbc00) /* pop without PC */ found_stack_adjust = 1; -- 1.9.0