From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4359 invoked by alias); 21 Nov 2013 01:18:30 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 4220 invoked by uid 89); 21 Nov 2013 01:18:29 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.1 required=5.0 tests=AWL,BAYES_50,RDNS_NONE,URIBL_BLOCKED autolearn=no version=3.3.2 X-HELO: relay1.mentorg.com Received: from Unknown (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 21 Nov 2013 01:18:28 +0000 Received: from svr-orw-exc-10.mgc.mentorg.com ([147.34.98.58]) by relay1.mentorg.com with esmtp id 1VjIuK-00069n-Tx from Yao_Qi@mentor.com for gdb-patches@sourceware.org; Wed, 20 Nov 2013 17:18:12 -0800 Received: from SVR-ORW-FEM-04.mgc.mentorg.com ([147.34.97.41]) by SVR-ORW-EXC-10.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.4675); Wed, 20 Nov 2013 17:18:12 -0800 Received: from qiyao.dyndns.org (147.34.91.1) by svr-orw-fem-04.mgc.mentorg.com (147.34.97.41) with Microsoft SMTP Server id 14.2.247.3; Wed, 20 Nov 2013 17:18:12 -0800 From: Yao Qi To: Subject: [PATCH 2/3] set/show code-cache Date: Thu, 21 Nov 2013 01:18:00 -0000 Message-ID: <1384996594-20865-3-git-send-email-yao@codesourcery.com> In-Reply-To: <1384996594-20865-1-git-send-email-yao@codesourcery.com> References: <1384996594-20865-1-git-send-email-yao@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain X-IsSubscribed: yes X-SW-Source: 2013-11/txt/msg00614.txt.bz2 Similar to stack cache, in this patch, we add TARGET_OBJECT_CODE_MEMORY to read code from target and add a new option "set code-cache on|off" to optimize code accesses by using the target memory cache. In V3: - Rename functions and variables. - Update command help, doc and NEWS entry. - Invalidate cache on option transitions, to align with the behaviour of "stack-cache". Since cache invalidation is transparent to users, users don't know option "stack-cache" transitions cause code cache invalidation. V2 was reviewed by Doug. There are some changes in V3, so I post it here. gdb: 2013-11-21 Yao Qi * NEWS: Add note on new "set code-cache" option. * target-dcache.c (code_cache_1, code_cache): New variables. (show_code_cache, set_code_cache): New function. (code_cache_enabled_p): New function. (_initialize_target_dcache): Register command. * target-dcache.h (code_cache_enabled_p): Declare. * target.c (memory_xfer_partial_1):Handle TARGET_OBJECT_CODE_MEMORY and code_cache_enabled. (target_read_code): New function. * target.h (enum target_object) : New. (target_read_code): Declare. gdb/doc: 2013-11-21 Yao Qi * gdb.texinfo (Caching Remote Data): Document new `set/show stack-cache' option. --- gdb/NEWS | 6 +++++ gdb/doc/gdb.texinfo | 16 ++++++++++++++- gdb/target-dcache.c | 52 +++++++++++++++++++++++++++++++++++++++++++++++++++ gdb/target-dcache.h | 2 + gdb/target.c | 22 ++++++++++++++++++-- gdb/target.h | 5 ++++ 6 files changed, 99 insertions(+), 4 deletions(-) diff --git a/gdb/NEWS b/gdb/NEWS index 9fc3638..86a9d63 100644 --- a/gdb/NEWS +++ b/gdb/NEWS @@ -117,6 +117,12 @@ show startup-with-shell Specifies whether Unix child processes are started via a shell or directly. +set code-cache +show code-cache + Use the target memory cache for accesses to the code segment. This + improves performance of remote debugging (particularly disassembly) + without affecting correctness. + * You can now use a literal value 'unlimited' for options that interpret 0 or -1 as meaning "unlimited". E.g., "set trace-buffer-size unlimited" is now an alias for "set diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index d1fa6c8..9e64dd2 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -10842,7 +10842,8 @@ Therefore, by default, @value{GDBN} only caches data known to be on the stack@footnote{In non-stop mode, it is moderately rare for a running thread to modify the stack of a stopped thread in a way that would interfere with a backtrace, and caching of -stack reads provides a significant speed up of remote backtraces.}. +stack reads provides a significant speed up of remote backtraces.} or +in the code segment. Other regions of memory can be explicitly marked as cacheable; @pxref{Memory Region Attributes}. @@ -10867,6 +10868,19 @@ caching. By default, this option is @code{ON}. @item show stack-cache Show the current state of data caching for memory accesses. +@kindex set code-cache +@item set code-cache on +@itemx set code-cache off +Enable or disable caching of code segment accesses. When @code{ON}, +use caching. By default, this option is @code{ON}. This improves +performance of disassembly in remote debugging without affecting +correctness. + +@kindex show code-cache +@item show code-cache +Show the current state of target memory cache for code segment +accesses. + @kindex info dcache @item info dcache @r{[}line@r{]} Print the information about the performance of data cache of the diff --git a/gdb/target-dcache.c b/gdb/target-dcache.c index 26f6f5d..58be6cd 100644 --- a/gdb/target-dcache.c +++ b/gdb/target-dcache.c @@ -124,6 +124,46 @@ stack_cache_enabled_p (void) return stack_cache; } +/* The option sets this. */ + +static int code_cache_1 = 1; + +/* And set_code_cache updates this. + The reason for the separation is so that we don't flush the cache for + on->on transitions. */ +static int code_cache = 1; + +/* This is called *after* the code-cache has been set. + Flush the cache for off->on and on->off transitions. + There's no real need to flush the cache for on->off transitions, + except cleanliness. */ + +static void +set_code_cache (char *args, int from_tty, struct cmd_list_element *c) +{ + if (code_cache != code_cache_1) + target_dcache_invalidate (); + + code_cache = code_cache_1; +} + +/* Show option "code-cache". */ + +static void +show_code_cache (struct ui_file *file, int from_tty, + struct cmd_list_element *c, const char *value) +{ + fprintf_filtered (file, _("Cache use for code accesses is %s.\n"), value); +} + +/* Return true if "code cache" is enabled, otherwise, return false. */ + +int +code_cache_enabled_p (void) +{ + return code_cache; +} + /* -Wmissing-prototypes */ extern initialize_file_ftype _initialize_target_dcache; @@ -141,6 +181,18 @@ By default, caching for stack access is on."), show_stack_cache, &setlist, &showlist); + add_setshow_boolean_cmd ("code-cache", class_support, + &code_cache, _("\ +Set cache use for code segment access."), _("\ +Show cache use for code segment access."), _("\ +When on, use the target memory cache for all code segment access,\n\ +regardless of any configured memory regions. This improves remote\n\ +performance significantly. By default, caching for code segment\n\ +access is on."), + set_code_cache, + show_code_cache, + &setlist, &showlist); + target_dcache_aspace_key = register_address_space_data_with_cleanup (NULL, target_dcache_cleanup); diff --git a/gdb/target-dcache.h b/gdb/target-dcache.h index 3200dd9..59e0b3d 100644 --- a/gdb/target-dcache.h +++ b/gdb/target-dcache.h @@ -30,4 +30,6 @@ extern int target_dcache_init_p (void); extern int stack_cache_enabled_p (void); +extern int code_cache_enabled_p (void); + #endif /* TARGET_DCACHE_H */ diff --git a/gdb/target.c b/gdb/target.c index 29f06b6..cc6194b 100644 --- a/gdb/target.c +++ b/gdb/target.c @@ -1547,7 +1547,8 @@ memory_xfer_partial_1 (struct target_ops *ops, enum target_object object, the collected memory range fails. */ && get_traceframe_number () == -1 && (region->attrib.cache - || (stack_cache_enabled_p () && object == TARGET_OBJECT_STACK_MEMORY))) + || (stack_cache_enabled_p () && object == TARGET_OBJECT_STACK_MEMORY) + || (code_cache_enabled_p () && object == TARGET_OBJECT_CODE_MEMORY))) { DCACHE *dcache = target_dcache_get_or_init (); @@ -1600,7 +1601,8 @@ memory_xfer_partial_1 (struct target_ops *ops, enum target_object object, && writebuf != NULL && target_dcache_init_p () && !region->attrib.cache - && stack_cache_enabled_p () && object != TARGET_OBJECT_STACK_MEMORY) + && ((stack_cache_enabled_p () && object != TARGET_OBJECT_STACK_MEMORY) + || (code_cache_enabled_p () && object != TARGET_OBJECT_CODE_MEMORY))) { DCACHE *dcache = target_dcache_get (); @@ -1696,7 +1698,8 @@ target_xfer_partial (struct target_ops *ops, /* If this is a memory transfer, let the memory-specific code have a look at it instead. Memory transfers are more complicated. */ - if (object == TARGET_OBJECT_MEMORY || object == TARGET_OBJECT_STACK_MEMORY) + if (object == TARGET_OBJECT_MEMORY || object == TARGET_OBJECT_STACK_MEMORY + || object == TARGET_OBJECT_CODE_MEMORY) retval = memory_xfer_partial (ops, object, readbuf, writebuf, offset, len); else @@ -1798,6 +1801,19 @@ target_read_stack (CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len) return TARGET_XFER_E_IO; } +/* Like target_read_memory, but specify explicitly that this is a read from + the target's code. This may trigger different cache behavior. */ + +int +target_read_code (CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len) +{ + if (target_read (current_target.beneath, TARGET_OBJECT_CODE_MEMORY, NULL, + myaddr, memaddr, len) == len) + return 0; + else + return TARGET_XFER_E_IO; +} + /* Write LEN bytes from MYADDR to target memory at address MEMADDR. Returns either 0 for success or a target_xfer_error value if any error occurs. If an error occurs, no guarantee is made about how diff --git a/gdb/target.h b/gdb/target.h index 646907a..890171d 100644 --- a/gdb/target.h +++ b/gdb/target.h @@ -145,6 +145,9 @@ enum target_object if it is not in a region marked as such, since it is known to be "normal" RAM. */ TARGET_OBJECT_STACK_MEMORY, + /* Memory known to be part of the target code. This is cached even + if it is not in a region marked as such. */ + TARGET_OBJECT_CODE_MEMORY, /* Kernel Unwind Table. See "ia64-tdep.c". */ TARGET_OBJECT_UNWIND_TABLE, /* Transfer auxilliary vector. */ @@ -1050,6 +1053,8 @@ extern int target_read_memory (CORE_ADDR memaddr, gdb_byte *myaddr, extern int target_read_stack (CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len); +extern int target_read_code (CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len); + extern int target_write_memory (CORE_ADDR memaddr, const gdb_byte *myaddr, ssize_t len); -- 1.7.7.6