From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 10555 invoked by alias); 9 Sep 2013 12:24:58 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 10446 invoked by uid 89); 9 Sep 2013 12:24:57 -0000 Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 09 Sep 2013 12:24:57 +0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.7 required=5.0 tests=AWL,BAYES_00,KHOP_THREADED,RDNS_NONE autolearn=no version=3.3.2 X-HELO: mga02.intel.com Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 09 Sep 2013 05:24:55 -0700 X-ExtLoop1: 1 Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga001.jf.intel.com with ESMTP; 09 Sep 2013 05:24:53 -0700 Received: from ulslx001.iul.intel.com (ulslx001.iul.intel.com [172.28.207.63]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id r89COqPn020633; Mon, 9 Sep 2013 13:24:52 +0100 Received: from ulslx001.iul.intel.com (localhost [127.0.0.1]) by ulslx001.iul.intel.com with ESMTP id r89COqGM009206; Mon, 9 Sep 2013 14:24:52 +0200 Received: (from wtedesch@localhost) by ulslx001.iul.intel.com with id r89COqmk009202; Mon, 9 Sep 2013 14:24:52 +0200 From: Walfred Tedeschi To: tromey@redhat.com, gdb-patches@sourceware.org, mark.kettenis@xs4all.nl Cc: Walfred Tedeschi Subject: [PATCH V5 8/8] Add MPX feature description to GDB manual. Date: Mon, 09 Sep 2013 12:25:00 -0000 Message-Id: <1378729481-9105-9-git-send-email-walfred.tedeschi@intel.com> In-Reply-To: <1378729481-9105-1-git-send-email-walfred.tedeschi@intel.com> References: <1378729481-9105-1-git-send-email-walfred.tedeschi@intel.com> X-IsSubscribed: yes X-SW-Source: 2013-09/txt/msg00284.txt.bz2 Describes MPX feature registers including bnd0raw ... bnd3raw, bnd0 ... bnd3 bndstatus and bndcfgu. News adds the section for Intel(R) Architecture Instructions Extensions and mention the MPX support. 2013-08-30 Walfred Tedeschi * NEWS: Add section for Intel(R) Architecture Instructions Extesions mentioning MPX. doc/ * gdb.texinfo (i386 Features): Add MPX feature. --- gdb/NEWS | 2 ++ gdb/doc/gdb.texinfo | 25 +++++++++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/gdb/NEWS b/gdb/NEWS index ca8baea..fc58cc4 100644 --- a/gdb/NEWS +++ b/gdb/NEWS @@ -5464,3 +5464,5 @@ GDB now handles cross debugging. If you are remotely debugging between two different machines, type ``./configure host -target=targ''. Host is the machine where GDB will run; targ is the machine where the program that you are debugging will run. + + * GDB now supports access to Intel(R) MPX registers on GNU/Linux. diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 21250fe..353c389 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -42560,6 +42560,31 @@ describe the upper 128 bits of @sc{ymm} registers: @samp{ymm0h} through @samp{ymm15h} for amd64 @end itemize +The @samp{org.gnu.gdb.i386.mpx} is an optional feature representing Intel(R) +Memory Protection Extension (MPX). MPX adds the bound registers @samp{BND0} +@footnote{Capital letters were used to distinguish between architecture +registers and pseudo registers. A set of pseudo register for the bound +registers were created to simplify the display.} through @samp{BND3}. Bound +registers store a pair of 64-bit values which are the lower bound and upper +bound. Bounds are effective addresses or memory locations. The upper bounds +are architecturally represented in 1's complement form. A bound having lower +bound = 0, and upper bound = 0 (1's complement of all bits set) will allow +access to the entire address space. + +In order to take the upper bound complement +of one into account the @samp{BND0} through @samp{BND3} are described in GDB +as @samp{bnd0raw} through @samp{bnd3raw}. Pseudo registers @samp{bnd0} through +@samp{bnd3} display the upper bound performing the complement of one operation, +i.e.@ when upper bound in @samp{bnd0raw} is 0 in the GDB @samp{bnd0} it will be +@code{0xfff...}. The feature adds the following registers: + +@itemize @minus +@item +@samp{bnd0raw} through @samp{bnd3raw} for i386, amd64 and x32. +@item +@samp{bndcfgu} and @samp{bndstatus} for i386, amd64 and x32. +@end itemize + The @samp{org.gnu.gdb.i386.linux} feature is optional. It should describe a single register, @samp{orig_eax}. -- 1.7.10.4