From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14373 invoked by alias); 13 Jul 2011 03:17:09 -0000 Received: (qmail 14364 invoked by uid 22791); 13 Jul 2011 03:17:08 -0000 X-SWARE-Spam-Status: No, hits=-0.5 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from nm9.bullet.mail.sp2.yahoo.com (HELO nm9.bullet.mail.sp2.yahoo.com) (98.139.91.79) by sourceware.org (qpsmtpd/0.43rc1) with SMTP; Wed, 13 Jul 2011 03:16:49 +0000 Received: from [98.139.91.69] by nm9.bullet.mail.sp2.yahoo.com with NNFMP; 13 Jul 2011 03:16:49 -0000 Received: from [98.139.91.29] by tm9.bullet.mail.sp2.yahoo.com with NNFMP; 13 Jul 2011 03:16:49 -0000 Received: from [127.0.0.1] by omp1029.mail.sp2.yahoo.com with NNFMP; 13 Jul 2011 03:16:49 -0000 Received: (qmail 19806 invoked by uid 60001); 13 Jul 2011 03:16:48 -0000 Received: from [115.99.18.98] by web112520.mail.gq1.yahoo.com via HTTP; Tue, 12 Jul 2011 20:16:48 PDT References: <998639.46560.qm@web112516.mail.gq1.yahoo.com> <321260.58442.qm@web112504.mail.gq1.yahoo.com> Message-ID: <1310527008.91138.YahooMailRC@web112520.mail.gq1.yahoo.com> Date: Wed, 13 Jul 2011 06:57:00 -0000 From: paawan oza Subject: Re: [PATCH] arm reversible : To: Tom Tromey Cc: gdb-patches@sourceware.org, =?iso-8859-1?Q?Petr_Hluz=EDn?= In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-07/txt/msg00336.txt.bz2 Thanks for your comments; I think I will need to scrutinize the overall pat= ch=20 and make it correct with your comments. I understand this patch has been lying around,but as Chandra K is working o= n the=20 port of gdb.reverse, we will see the results soon. Regards, Oza. ----- Original Message ---- From: Tom Tromey To: paawan oza Cc: gdb-patches@sourceware.org; Petr Hluz=EDn Sent: Wed, July 13, 2011 2:29:36 AM Subject: Re: [PATCH] arm reversible : >>>>> "Oza" =3D=3D paawan oza writes: Oza> any more comments are welcome make this patch ok, if ARM person can Oza> have a look at it it would be great. You have submitted this patch many times now and nobody has commented on the details of the ARM decoding. I think we should proceed on the theory that this is simply not going to happen. Also, I am not as concerned about the correctness of every detail as I am about the general maintainability and style of the code. I expect there will be bugs; those can be fixed. You need a ChangeLog entry. A patch of this magnitude should also have a NEWS entry. Some kind of testing would be good. Do the existing tests in gdb.reverse work with your port? If so then I think that is sufficient Oza> + unsigned int reg_len =3D 0; reg_len =3D LENGTH; \ Just write unsigned int reg_len =3D LENGTH; Oza> + REGS =3D (uint32_t*) xmalloc (sizeof(uint32_t) * (reg_len)); \ Mind the spaces and parens. Better, use XNEWVEC: REGS =3D XNEWVEC (uint32_t, reg_len); Oza> + while (reg_len) \ Oza> + { \ Oza> + REGS[reg_len - 1] =3D RECORD_BUF[reg_len - 1]; \ Oza> + reg_len--; \ Oza> + } \ Just use memcpy. Oza> +#define MEM_ALLOC(MEMS,LENGTH,RECORD_BUF) \ The same comments apply for this macro. Oza> +/* ARM instruction record contains opcode of current insn and executi= on=20 state=20 Oza> (before entry to=20 Oza> +decode_insn() ), contains list of to-be-modified registers and memory= =20 blocks=20 Oza> (on return from=20 Your email got corrupted. Usually this is some bad MUA setting. Oza> + uint32_t mem_rec_count; /* No of mem recors */ Typo, "recors" Oza> +/* Checks ARM SBZ and SBO mendatory fields. */ Typo, should be "mandatory". Oza> + if(!sbo) Spacing. Oza> + if ((3 =3D=3D opcode1) && (bit (arm_insn_r->arm_insn, 4))) Over-parenthesizing makes the code harder to read. Please fix this. I noticed it in many places. This specific case should read: if (3 =3D=3D opcode1 && bit (arm_insn_r->arm_insn, 4)) Oza> + memset(&u_buf, 0, sizeof (u_buf)); Spacing. Just go through the entire patch and fix all the spacing issues. I feel like I have mentioned this before. Oza> + regcache_raw_read_unsigned (reg_cache, reg_src1 Oza> + , &u_buf[0].unsigned_regval); What if this does not return REG_VALID? There are multiple instances of this. Oza> + gdb_assert_not_reached ("no decoding pattern found"); It seems wrong to use an assert in this code. At least, it is not obvious to me that this represents a logic error in gdb as opposed to a merely unrecognized instruction. An unrecognized instruction can occur for many reasons, e.g., a bad jump. Oza> + if ((8 =3D=3D arm_insn_r->opcode) || (10 =3D=3D arm_insn_r->opc= ode)=20=20=20=20 Oza> + || (12 =3D=3D arm_insn_r->opcode) || (14 =3D=3D arm_insn_r->opc= ode) Oza> + || (9 =3D=3D arm_insn_r->opcode) || (11 =3D=3D arm_insn_r->opco= de)=20=20=20=20 Oza> + || (13 =3D=3D arm_insn_r->opcode) || (15 =3D=3D arm_insn_r->opc= ode)=20=20=20=20=20=20=20=20 Oza> + || (0 =3D=3D arm_insn_r->opcode) || (2 =3D=3D arm_insn_r->opcod= e)=20=20=20=20 Oza> + || (4 =3D=3D arm_insn_r->opcode) || (6 =3D=3D arm_insn_r->opcod= e) Oza> + || (1 =3D=3D arm_insn_r->opcode) || (3 =3D=3D arm_insn_r->opcod= e) Oza> + || (5 =3D=3D arm_insn_r->opcode) || (7 =3D=3D arm_insn_r->opcod= e)) This reads very oddly. Is there a particular reason behind the ordering (if so -- document). If not, isn't this: if (arm_insn_r->opcode >=3D 0 && arm_insn_r->opcode <=3D 15) There are other odd-looking conditions like this. Oza> + default: Oza> + gdb_assert_not_reached ("Invalid addressing mode for= =20 insn"); Again, assert seems wrong. I'm afraid I ran out of steam here. Please fix all the issues already noted and look at the rest of the patch with a critical eye to see what else should be cleaned up. I want this patch to go in, but first it must comply to the usual gdb standards. Tom