From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5957 invoked by alias); 23 Mar 2011 02:13:39 -0000 Received: (qmail 5944 invoked by uid 22791); 23 Mar 2011 02:13:38 -0000 X-SWARE-Spam-Status: No, hits=-2.0 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from smtp.gentoo.org (HELO smtp.gentoo.org) (140.211.166.183) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 23 Mar 2011 02:13:26 +0000 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.gentoo.org (Postfix) with ESMTP id ED1E91B4080; Wed, 23 Mar 2011 02:13:24 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Cc: Robin Getz Subject: [PATCH] sim: bfin: update VIT_MAX behavior to match hardware when Acc.X bits are set Date: Wed, 23 Mar 2011 05:15:00 -0000 Message-Id: <1300846434-16399-1-git-send-email-vapier@gentoo.org> X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-03/txt/msg01015.txt.bz2 From: Robin Getz The Blackfin PRM says that the top 8 bits of the accumulator must be cleared when using the VIT_MAX insn, so the sim has followed this spec. Matching the hardware behavior though when the high bits are not cleared is easy to do and doesn't break existing behavior, so go for it. Signed-off-by: Robin Getz Signed-off-by: Mike Frysinger 2011-03-21 Robin Getz * bfin-sim.c (decode_dsp32shift_0): Set acc0 to the unextended value for the VIT_MAX insn, and mask off the result when done. --- sim/bfin/bfin-sim.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c index 42c9c55..3916fad 100644 --- a/sim/bfin/bfin-sim.c +++ b/sim/bfin/bfin-sim.c @@ -5437,7 +5437,7 @@ decode_dsp32shift_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1) } else if ((sop == 0 || sop == 1) && sopcde == 9) { - bs40 acc0 = get_extended_acc (cpu, 0); + bs40 acc0 = get_unextended_acc (cpu, 0); bs16 sL, sH, out; TRACE_INSN (cpu, "R%i.L = VIT_MAX (R%i) (AS%c);", @@ -5447,7 +5447,7 @@ decode_dsp32shift_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1) sH = DREG (src1) >> 16; if (sop & 1) - acc0 >>= 1; + acc0 = (acc0 & 0xfeffffffffull) >> 1; else acc0 <<= 1; -- 1.7.4.1